1 /*
2 * Copyright 2021 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
7 #include <errno.h>
8 #include <string.h>
9 #include <sys/mman.h>
10 #include <xf86drm.h>
11
12 #include "drv_helpers.h"
13 #include "drv_priv.h"
14 #include "external/virtgpu_cross_domain_protocol.h"
15 #include "external/virtgpu_drm.h"
16 #include "util.h"
17 #include "virtgpu.h"
18
19 #define CAPSET_CROSS_DOMAIN 5
20 #define CAPSET_CROSS_FAKE 30
21
22 static const uint32_t scanout_render_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
23 DRM_FORMAT_RGB565, DRM_FORMAT_XBGR8888,
24 DRM_FORMAT_XRGB8888 };
25
26 static const uint32_t texture_only_formats[] = {
27 DRM_FORMAT_R8, DRM_FORMAT_NV12, DRM_FORMAT_P010,
28 DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID, DRM_FORMAT_ABGR2101010,
29 DRM_FORMAT_ARGB2101010, DRM_FORMAT_XBGR2101010, DRM_FORMAT_XRGB2101010,
30 DRM_FORMAT_ABGR16161616F
31 };
32
33 extern struct virtgpu_param params[];
34
35 struct cross_domain_private {
36 uint32_t ring_handle;
37 void *ring_addr;
38 struct drv_array *metadata_cache;
39 pthread_mutex_t metadata_cache_lock;
40 };
41
cross_domain_release_private(struct driver * drv)42 static void cross_domain_release_private(struct driver *drv)
43 {
44 int ret;
45 struct cross_domain_private *priv = drv->priv;
46 struct drm_gem_close gem_close = { 0 };
47
48 if (priv->ring_addr != MAP_FAILED)
49 munmap(priv->ring_addr, PAGE_SIZE);
50
51 if (priv->ring_handle) {
52 gem_close.handle = priv->ring_handle;
53
54 ret = drmIoctl(drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
55 if (ret) {
56 drv_loge("DRM_IOCTL_GEM_CLOSE failed (handle=%x) error %d\n",
57 priv->ring_handle, ret);
58 }
59 }
60
61 if (priv->metadata_cache)
62 drv_array_destroy(priv->metadata_cache);
63
64 pthread_mutex_destroy(&priv->metadata_cache_lock);
65
66 free(priv);
67 }
68
add_combinations(struct driver * drv)69 static void add_combinations(struct driver *drv)
70 {
71 struct format_metadata metadata;
72
73 // Linear metadata always supported.
74 metadata.tiling = 0;
75 metadata.priority = 1;
76 metadata.modifier = DRM_FORMAT_MOD_LINEAR;
77
78 drv_add_combinations(drv, scanout_render_formats, ARRAY_SIZE(scanout_render_formats),
79 &metadata, BO_USE_RENDER_MASK | BO_USE_SCANOUT);
80
81 drv_add_combinations(drv, texture_only_formats, ARRAY_SIZE(texture_only_formats), &metadata,
82 BO_USE_TEXTURE_MASK);
83
84 /* Android CTS tests require this. */
85 drv_add_combination(drv, DRM_FORMAT_BGR888, &metadata, BO_USE_SW_MASK);
86
87 drv_modify_combination(drv, DRM_FORMAT_YVU420, &metadata, BO_USE_HW_VIDEO_ENCODER);
88 drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
89 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_HW_VIDEO_DECODER |
90 BO_USE_SCANOUT | BO_USE_HW_VIDEO_ENCODER);
91
92 /*
93 * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
94 * from camera, input/output from hardware decoder/encoder and sensors, and
95 * AHBs used as SSBOs/UBOs.
96 */
97 drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
98 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_HW_VIDEO_DECODER |
99 BO_USE_HW_VIDEO_ENCODER | BO_USE_SENSOR_DIRECT_DATA |
100 BO_USE_GPU_DATA_BUFFER);
101
102 drv_modify_linear_combinations(drv);
103 }
104
cross_domain_submit_cmd(struct driver * drv,uint32_t * cmd,uint32_t cmd_size,bool wait)105 static int cross_domain_submit_cmd(struct driver *drv, uint32_t *cmd, uint32_t cmd_size, bool wait)
106 {
107 int ret;
108 struct drm_virtgpu_3d_wait wait_3d = { 0 };
109 struct drm_virtgpu_execbuffer exec = { 0 };
110 struct cross_domain_private *priv = drv->priv;
111
112 exec.flags = VIRTGPU_EXECBUF_RING_IDX;
113 exec.command = (uint64_t)&cmd[0];
114 exec.size = cmd_size;
115 if (wait) {
116 exec.bo_handles = (uint64_t)&priv->ring_handle;
117 exec.num_bo_handles = 1;
118 }
119
120 ret = drmIoctl(drv->fd, DRM_IOCTL_VIRTGPU_EXECBUFFER, &exec);
121 if (ret < 0) {
122 drv_loge("DRM_IOCTL_VIRTGPU_EXECBUFFER failed with %s\n", strerror(errno));
123 return -EINVAL;
124 }
125
126 ret = -EAGAIN;
127 while (ret == -EAGAIN) {
128 wait_3d.handle = priv->ring_handle;
129 ret = drmIoctl(drv->fd, DRM_IOCTL_VIRTGPU_WAIT, &wait_3d);
130 }
131
132 if (ret < 0) {
133 drv_loge("DRM_IOCTL_VIRTGPU_WAIT failed with %s\n", strerror(errno));
134 return ret;
135 }
136
137 return 0;
138 }
139
metadata_equal(struct bo_metadata * current,struct bo_metadata * cached)140 static bool metadata_equal(struct bo_metadata *current, struct bo_metadata *cached)
141 {
142 if ((current->width == cached->width) && (current->height == cached->height) &&
143 (current->format == cached->format) && (current->use_flags == cached->use_flags))
144 return true;
145 return false;
146 }
147
cross_domain_metadata_query(struct driver * drv,struct bo_metadata * metadata)148 static int cross_domain_metadata_query(struct driver *drv, struct bo_metadata *metadata)
149 {
150 int ret = 0;
151 struct bo_metadata *cached_data = NULL;
152 struct cross_domain_private *priv = drv->priv;
153 struct CrossDomainGetImageRequirements cmd_get_reqs;
154 uint32_t *addr = (uint32_t *)priv->ring_addr;
155 uint32_t plane, remaining_size;
156
157 memset(&cmd_get_reqs, 0, sizeof(cmd_get_reqs));
158 pthread_mutex_lock(&priv->metadata_cache_lock);
159 for (uint32_t i = 0; i < drv_array_size(priv->metadata_cache); i++) {
160 cached_data = (struct bo_metadata *)drv_array_at_idx(priv->metadata_cache, i);
161 if (!metadata_equal(metadata, cached_data))
162 continue;
163
164 memcpy(metadata, cached_data, sizeof(*cached_data));
165 goto out_unlock;
166 }
167
168 cmd_get_reqs.hdr.cmd = CROSS_DOMAIN_CMD_GET_IMAGE_REQUIREMENTS;
169 cmd_get_reqs.hdr.cmd_size = sizeof(struct CrossDomainGetImageRequirements);
170
171 cmd_get_reqs.width = metadata->width;
172 cmd_get_reqs.height = metadata->height;
173 cmd_get_reqs.drm_format =
174 (metadata->format == DRM_FORMAT_YVU420_ANDROID) ? DRM_FORMAT_YVU420 : metadata->format;
175 cmd_get_reqs.flags = metadata->use_flags;
176
177 /*
178 * It is possible to avoid blocking other bo_create() calls by unlocking before
179 * cross_domain_submit_cmd() and re-locking afterwards. However, that would require
180 * another scan of the metadata cache before drv_array_append in case two bo_create() calls
181 * do the same metadata query. Until cross_domain functionality is more widely tested,
182 * leave this optimization out for now.
183 */
184 ret = cross_domain_submit_cmd(drv, (uint32_t *)&cmd_get_reqs, cmd_get_reqs.hdr.cmd_size,
185 true);
186 if (ret < 0)
187 goto out_unlock;
188
189 memcpy(&metadata->strides, &addr[0], 4 * sizeof(uint32_t));
190 memcpy(&metadata->offsets, &addr[4], 4 * sizeof(uint32_t));
191 memcpy(&metadata->format_modifier, &addr[8], sizeof(uint64_t));
192 memcpy(&metadata->total_size, &addr[10], sizeof(uint64_t));
193 memcpy(&metadata->blob_id, &addr[12], sizeof(uint32_t));
194
195 metadata->map_info = addr[13];
196 metadata->memory_idx = addr[14];
197 metadata->physical_device_idx = addr[15];
198
199 remaining_size = metadata->total_size;
200 for (plane = 0; plane < metadata->num_planes; plane++) {
201 if (plane != 0) {
202 metadata->sizes[plane - 1] = metadata->offsets[plane];
203 remaining_size -= metadata->offsets[plane];
204 }
205 }
206
207 metadata->sizes[plane - 1] = remaining_size;
208 drv_array_append(priv->metadata_cache, metadata);
209
210 out_unlock:
211 pthread_mutex_unlock(&priv->metadata_cache_lock);
212 return ret;
213 }
214
215 /* Fill out metadata for guest buffers, used only for CPU access: */
cross_domain_get_emulated_metadata(struct bo_metadata * metadata)216 void cross_domain_get_emulated_metadata(struct bo_metadata *metadata)
217 {
218 uint32_t offset = 0;
219
220 for (size_t i = 0; i < metadata->num_planes; i++) {
221 metadata->strides[i] = drv_stride_from_format(metadata->format, metadata->width, i);
222 metadata->sizes[i] = drv_size_from_format(metadata->format, metadata->strides[i],
223 metadata->height, i);
224 metadata->offsets[i] = offset;
225 offset += metadata->sizes[i];
226 }
227
228 metadata->total_size = offset;
229 }
230
cross_domain_init(struct driver * drv)231 static int cross_domain_init(struct driver *drv)
232 {
233 int ret;
234 struct cross_domain_private *priv;
235 struct drm_virtgpu_map map = { 0 };
236 struct drm_virtgpu_get_caps args = { 0 };
237 struct drm_virtgpu_context_init init = { 0 };
238 struct drm_virtgpu_resource_create_blob drm_rc_blob = { 0 };
239 struct drm_virtgpu_context_set_param ctx_set_params[2] = { { 0 } };
240
241 struct CrossDomainInit cmd_init;
242 struct CrossDomainCapabilities cross_domain_caps;
243
244 memset(&cmd_init, 0, sizeof(cmd_init));
245 if (!params[param_context_init].value)
246 return -ENOTSUP;
247
248 if ((params[param_supported_capset_ids].value & (1 << CAPSET_CROSS_DOMAIN)) == 0)
249 return -ENOTSUP;
250
251 if (!params[param_resource_blob].value)
252 return -ENOTSUP;
253
254 /// Need zero copy memory
255 if (!params[param_host_visible].value && !params[param_create_guest_handle].value)
256 return -ENOTSUP;
257
258 priv = calloc(1, sizeof(*priv));
259 if (!priv)
260 return -ENOMEM;
261
262 ret = pthread_mutex_init(&priv->metadata_cache_lock, NULL);
263 if (ret) {
264 free(priv);
265 return ret;
266 }
267
268 priv->metadata_cache = drv_array_init(sizeof(struct bo_metadata));
269 if (!priv->metadata_cache) {
270 ret = -ENOMEM;
271 goto free_private;
272 }
273
274 priv->ring_addr = MAP_FAILED;
275 drv->priv = priv;
276
277 args.cap_set_id = CAPSET_CROSS_DOMAIN;
278 args.size = sizeof(struct CrossDomainCapabilities);
279 args.addr = (unsigned long long)&cross_domain_caps;
280
281 ret = drmIoctl(drv->fd, DRM_IOCTL_VIRTGPU_GET_CAPS, &args);
282 if (ret) {
283 drv_loge("DRM_IOCTL_VIRTGPU_GET_CAPS failed with %s\n", strerror(errno));
284 goto free_private;
285 }
286
287 // When 3D features are avilable, but the host does not support external memory, fall back
288 // to the virgl minigbm backend. This typically means the guest side minigbm resource will
289 // be backed by a host OpenGL texture.
290 if (!cross_domain_caps.supports_external_gpu_memory && params[param_3d].value) {
291 ret = -ENOTSUP;
292 goto free_private;
293 }
294
295 // Intialize the cross domain context. Create one fence context to wait for metadata
296 // queries.
297 ctx_set_params[0].param = VIRTGPU_CONTEXT_PARAM_CAPSET_ID;
298 ctx_set_params[0].value = CAPSET_CROSS_DOMAIN;
299 ctx_set_params[1].param = VIRTGPU_CONTEXT_PARAM_NUM_RINGS;
300 ctx_set_params[1].value = 1;
301
302 init.ctx_set_params = (unsigned long long)&ctx_set_params[0];
303 init.num_params = 2;
304 ret = drmIoctl(drv->fd, DRM_IOCTL_VIRTGPU_CONTEXT_INIT, &init);
305 if (ret) {
306 drv_loge("DRM_IOCTL_VIRTGPU_CONTEXT_INIT failed with %s\n", strerror(errno));
307 goto free_private;
308 }
309
310 // Create a shared ring buffer to read metadata queries.
311 drm_rc_blob.size = PAGE_SIZE;
312 drm_rc_blob.blob_mem = VIRTGPU_BLOB_MEM_GUEST;
313 drm_rc_blob.blob_flags = VIRTGPU_BLOB_FLAG_USE_MAPPABLE;
314
315 ret = drmIoctl(drv->fd, DRM_IOCTL_VIRTGPU_RESOURCE_CREATE_BLOB, &drm_rc_blob);
316 if (ret < 0) {
317 drv_loge("DRM_VIRTGPU_RESOURCE_CREATE_BLOB failed with %s\n", strerror(errno));
318 goto free_private;
319 }
320
321 priv->ring_handle = drm_rc_blob.bo_handle;
322
323 // Map shared ring buffer.
324 map.handle = priv->ring_handle;
325 ret = drmIoctl(drv->fd, DRM_IOCTL_VIRTGPU_MAP, &map);
326 if (ret < 0) {
327 drv_loge("DRM_IOCTL_VIRTGPU_MAP failed with %s\n", strerror(errno));
328 goto free_private;
329 }
330
331 priv->ring_addr =
332 mmap(0, PAGE_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, drv->fd, map.offset);
333
334 if (priv->ring_addr == MAP_FAILED) {
335 drv_loge("mmap failed with %s\n", strerror(errno));
336 goto free_private;
337 }
338
339 // Notify host about ring buffer
340 cmd_init.hdr.cmd = CROSS_DOMAIN_CMD_INIT;
341 cmd_init.hdr.cmd_size = sizeof(struct CrossDomainInit);
342 cmd_init.ring_id = drm_rc_blob.res_handle;
343 ret = cross_domain_submit_cmd(drv, (uint32_t *)&cmd_init, cmd_init.hdr.cmd_size, false);
344 if (ret < 0)
345 goto free_private;
346
347 // minigbm bookkeeping
348 add_combinations(drv);
349 return 0;
350
351 free_private:
352 cross_domain_release_private(drv);
353 return ret;
354 }
355
cross_domain_close(struct driver * drv)356 static void cross_domain_close(struct driver *drv)
357 {
358 cross_domain_release_private(drv);
359 }
360
cross_domain_bo_create(struct bo * bo,uint32_t width,uint32_t height,uint32_t format,uint64_t use_flags)361 static int cross_domain_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
362 uint64_t use_flags)
363 {
364 int ret;
365 uint32_t blob_flags = VIRTGPU_BLOB_FLAG_USE_SHAREABLE;
366 struct drm_virtgpu_resource_create_blob drm_rc_blob = { 0 };
367
368 if (use_flags & (BO_USE_SW_MASK | BO_USE_GPU_DATA_BUFFER))
369 blob_flags |= VIRTGPU_BLOB_FLAG_USE_MAPPABLE;
370
371 if (!(use_flags & BO_USE_HW_MASK)) {
372 cross_domain_get_emulated_metadata(&bo->meta);
373 drm_rc_blob.blob_mem = VIRTGPU_BLOB_MEM_GUEST;
374 } else {
375 ret = cross_domain_metadata_query(bo->drv, &bo->meta);
376 if (ret < 0) {
377 drv_loge("Metadata query failed");
378 return ret;
379 }
380
381 if (params[param_cross_device].value)
382 blob_flags |= VIRTGPU_BLOB_FLAG_USE_CROSS_DEVICE;
383
384 /// It may be possible to have host3d blobs and handles from guest memory at the
385 /// same time. But for the immediate use cases, we will either have one or the
386 /// other. For now, just prefer guest memory since adding that feature is more
387 /// involved (requires --udmabuf flag to crosvm), so developers would likely test
388 /// that.
389 if (params[param_create_guest_handle].value) {
390 drm_rc_blob.blob_mem = VIRTGPU_BLOB_MEM_GUEST;
391 blob_flags |= VIRTGPU_BLOB_FLAG_CREATE_GUEST_HANDLE;
392 } else if (params[param_host_visible].value) {
393 drm_rc_blob.blob_mem = VIRTGPU_BLOB_MEM_HOST3D;
394 }
395 drm_rc_blob.blob_id = (uint64_t)bo->meta.blob_id;
396 }
397
398 drm_rc_blob.size = bo->meta.total_size;
399 drm_rc_blob.blob_flags = blob_flags;
400
401 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_RESOURCE_CREATE_BLOB, &drm_rc_blob);
402 if (ret < 0) {
403 drv_loge("DRM_VIRTGPU_RESOURCE_CREATE_BLOB failed with %s\n", strerror(errno));
404 return -errno;
405 }
406
407 for (uint32_t plane = 0; plane < bo->meta.num_planes; plane++)
408 bo->handles[plane].u32 = drm_rc_blob.bo_handle;
409
410 return 0;
411 }
412
cross_domain_bo_map(struct bo * bo,struct vma * vma,uint32_t map_flags)413 static void *cross_domain_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags)
414 {
415 int ret;
416 struct drm_virtgpu_map gem_map = { 0 };
417
418 gem_map.handle = bo->handles[0].u32;
419 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_MAP, &gem_map);
420 if (ret) {
421 drv_loge("DRM_IOCTL_VIRTGPU_MAP failed with %s\n", strerror(errno));
422 return MAP_FAILED;
423 }
424
425 vma->length = bo->meta.total_size;
426 return mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
427 gem_map.offset);
428 }
429
430 const struct backend virtgpu_cross_domain = {
431 .name = "virtgpu_cross_domain",
432 .init = cross_domain_init,
433 .close = cross_domain_close,
434 .bo_create = cross_domain_bo_create,
435 .bo_import = drv_prime_bo_import,
436 .bo_destroy = drv_gem_bo_destroy,
437 .bo_map = cross_domain_bo_map,
438 .bo_unmap = drv_bo_munmap,
439 .resolve_format_and_use_flags = drv_resolve_format_and_use_flags_helper,
440 };
441