| /art/compiler/utils/x86_64/ |
| D | jni_macro_assembler_x86_64.cc | 73 __ subq(CpuRegister(RSP), Immediate(rest_of_frame)); in BuildFrame()
83 __ movsd(Address(CpuRegister(RSP), offset), spill.AsXmmRegister()); in BuildFrame()
92 __ movq(Address(CpuRegister(RSP), 0), method_reg.AsX86_64().AsCpuRegister()); in BuildFrame()
109 __ movsd(spill.AsXmmRegister(), Address(CpuRegister(RSP), offset)); in RemoveFrame()
119 __ addq(CpuRegister(RSP), Immediate(offset)); in RemoveFrame()
139 __ addq(CpuRegister(RSP), Immediate(-static_cast<int64_t>(adjust))); in IncreaseFrameSize()
147 assembler->addq(CpuRegister(RSP), Immediate(adjust)); in DecreaseFrameSizeImpl()
163 Store(X86_64ManagedRegister::FromCpuRegister(RSP), MemberOffset(offs.Int32Value()), msrc, size); in Store()
201 __ movq(Address(CpuRegister(RSP), dest), src.AsCpuRegister()); in StoreRawPtr()
207 __ movq(reg, CpuRegister(RSP)); in StoreStackPointerToThread()
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| D | assembler_x86_64.h | 118 return (rm() == RBP || (rm() == RSP && base() == RBP)) ? disp32() : 0; in disp()
220 CHECK_EQ(base_in.AsRegister(), RSP); in Address()
221 Init(CpuRegister(RSP), disp.Int32Value()); in Address()
231 if (base_in.LowBits() == RSP) { in Init()
232 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init()
236 if (base_in.LowBits() == RSP) { in Init()
237 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init()
242 if (base_in.LowBits() == RSP) { in Init()
243 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init()
250 CHECK_NE(index_in.AsRegister(), RSP); // Illegal addressing mode. in Address()
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| D | assembler_x86_64_test.cc | 180 x86_64::Address(x86_64::CpuRegister(x86_64::RSP), in SetUpHelpers()
183 x86_64::Address(x86_64::CpuRegister(x86_64::RSP), in SetUpHelpers()
186 x86_64::Address(x86_64::CpuRegister(x86_64::RSP), in SetUpHelpers()
189 x86_64::Address(x86_64::CpuRegister(x86_64::RSP), in SetUpHelpers()
191 addresses_.push_back(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), -1)); in SetUpHelpers()
192 addresses_.push_back(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 0)); in SetUpHelpers()
193 addresses_.push_back(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 1)); in SetUpHelpers()
194 addresses_.push_back(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 987654321)); in SetUpHelpers()
208 registers_.push_back(new x86_64::CpuRegister(x86_64::RSP)); in SetUpHelpers()
225 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::RSP), "esp"); in SetUpHelpers()
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| D | assembler_x86_64.cc | 42 if (addr.rm() != RSP || addr.cpu_index().AsRegister() == RSP) { in operator <<()
51 if (addr.rm() != RSP || addr.cpu_index().AsRegister() == RSP) { in operator <<()
57 if (addr.rm() != RSP || addr.cpu_index().AsRegister() == RSP) { in operator <<()
5293 movsd(dst, Address(CpuRegister(RSP), 0)); in LoadDoubleConstant()
5294 addq(CpuRegister(RSP), Immediate(2 * sizeof(intptr_t))); in LoadDoubleConstant()
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| /art/compiler/optimizing/ |
| D | code_generator_x86_64.cc | 546 DCHECK_NE(ref_reg, RSP); in EmitNativeCode()
636 DCHECK_NE(ref_reg, RSP); in EmitNativeCode()
1448 __ movq(Address(CpuRegister(RSP), stack_index), CpuRegister(reg_id)); in SaveCoreRegister()
1453 __ movq(CpuRegister(reg_id), Address(CpuRegister(RSP), stack_index)); in RestoreCoreRegister()
1459 __ movups(Address(CpuRegister(RSP), stack_index), XmmRegister(reg_id)); in SaveFloatingPointRegister()
1461 __ movsd(Address(CpuRegister(RSP), stack_index), XmmRegister(reg_id)); in SaveFloatingPointRegister()
1468 __ movups(XmmRegister(reg_id), Address(CpuRegister(RSP), stack_index)); in RestoreFloatingPointRegister()
1470 __ movsd(XmmRegister(reg_id), Address(CpuRegister(RSP), stack_index)); in RestoreFloatingPointRegister()
1573 blocked_core_registers_[RSP] = true; in SetupBlockedRegisters()
1602 __ cmpl(Address(CpuRegister(RSP), codegen_->GetStackOffsetOfShouldDeoptimizeFlag()), in GenerateMethodEntryExitHook()
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| D | intrinsics_x86_64.cc | 2757 __ popcntq(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenBitCount()
2760 __ popcntl(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenBitCount()
2836 __ bsrq(tmp, Address(CpuRegister(RSP), src.GetStackIndex())); in GenOneBit()
2839 __ bsrl(tmp, Address(CpuRegister(RSP), src.GetStackIndex())); in GenOneBit()
2864 __ movq(tmp, Address(CpuRegister(RSP), src.GetStackIndex())); in GenOneBit()
2867 __ movl(tmp, Address(CpuRegister(RSP), src.GetStackIndex())); in GenOneBit()
2951 __ bsrq(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenLeadingZeros()
2954 __ bsrl(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenLeadingZeros()
3024 __ bsfq(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenTrailingZeros()
3027 __ bsfl(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenTrailingZeros()
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| D | code_generator_x86_64.h | 696 assembler_.lock()->addl(Address(CpuRegister(RSP), 0), Immediate(0));
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| /art/runtime/arch/x86_64/ |
| D | context_x86_64.cc | 31 gprs_[RSP] = &rsp_; in Reset()
34 rsp_ = kBadGprBase + RSP; in Reset()
118 uintptr_t rsp = gprs[kNumberOfCpuRegisters - RSP - 1] - sizeof(intptr_t); in DoLongJump()
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| D | registers_x86_64.h | 32 RSP = 4, enumerator
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| D | context_x86_64.h | 41 SetGPR(RSP, new_sp); in SetSP()
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