| /art/compiler/debug/dwarf/ |
| D | dwarf_test.cc | 33 const bool is64bit = false; in TEST_F() local
123 WriteCIE(is64bit, Reg(is64bit ? 16 : 8), initial_opcodes, &debug_frame_data_); in TEST_F()
124 WriteFDE(is64bit, in TEST_F()
131 CheckObjdumpOutput(is64bit, "-debug-frame"); in TEST_F()
135 constexpr bool is64bit = true; in TEST_F() local
137 WriteCIE(is64bit, Reg(16), initial_opcodes, &debug_frame_data_); in TEST_F()
140 WriteFDE(is64bit, in TEST_F()
148 CheckObjdumpOutput(is64bit, "-debug-frame"); in TEST_F()
154 constexpr bool is64bit = true; in TEST_F() local
181 WriteCIE(is64bit, Reg(16), initial_opcodes, &debug_frame_data_); in TEST_F()
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| D | dwarf_test.h | 114 std::vector<std::string> Objdump(bool is64bit, const char* args) { in Objdump() argument
115 if (is64bit) { in Objdump()
123 void CheckObjdumpOutput(bool is64bit, const char* args) { in CheckObjdumpOutput() argument
124 std::vector<std::string> actual_lines = Objdump(is64bit, args); in CheckObjdumpOutput()
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| /art/libelffile/dwarf/ |
| D | headers.h | 41 void WriteCIE(bool is64bit, in WriteCIE() argument
53 writer.PushUint8(is64bit ? 8 : 4); // Address size. in WriteCIE()
59 writer.Pad(is64bit ? 8 : 4); in WriteCIE()
65 void WriteFDE(bool is64bit, in WriteFDE() argument
76 if (is64bit) { in WriteFDE()
85 writer.Pad(is64bit ? 8 : 4); in WriteFDE()
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| /art/compiler/debug/ |
| D | elf_debug_frame_writer.h | 43 bool is64bit = Is64BitInstructionSet(isa); in WriteCIE() local
66 WriteCIE(is64bit, return_reg, opcodes, buffer); in WriteCIE()
89 WriteCIE(is64bit, return_reg, opcodes, buffer); in WriteCIE()
119 WriteCIE(is64bit, return_reg, opcodes, buffer); in WriteCIE()
145 WriteCIE(is64bit, return_reg, opcodes, buffer); in WriteCIE()
191 const bool is64bit = Is64BitInstructionSet(builder->GetIsa()); in WriteCFISection() local
208 dwarf::WriteFDE(is64bit, in WriteCFISection()
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| D | elf_debug_loc_writer.h | 200 const bool is64bit = Is64BitInstructionSet(isa); in WriteDebugLocEntry() local
262 if (is64bit) { in WriteDebugLocEntry()
277 if (is64bit) { in WriteDebugLocEntry()
296 if (is64bit) { in WriteDebugLocEntry()
305 if (is64bit) { in WriteDebugLocEntry()
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| D | elf_debug_line_writer.h | 54 const bool is64bit = Is64BitInstructionSet(isa); in WriteCompilationUnit() local
83 dwarf::DebugLineOpCodeWriter<> opcodes(is64bit, code_factor_bits_); in WriteCompilationUnit()
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| D | elf_debug_info_writer.h | 114 const bool is64bit = Is64BitInstructionSet(owner_->builder_->GetIsa()); in Write() local
131 if (is64bit) { in Write()
139 if (is64bit) { in Write()
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| /art/compiler/ |
| D | cfi_test.h | 50 constexpr bool is64bit = false; in GenerateExpected() local
52 dwarf::WriteCIE(is64bit, dwarf::Reg(8), initial_opcodes, &debug_frame_data_); in GenerateExpected()
54 dwarf::WriteFDE(is64bit, in GenerateExpected()
68 is64bit in GenerateExpected()
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.h | 460 void cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit);
461 void cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit);
503 void movd(XmmRegister dst, CpuRegister src, bool is64bit);
504 void movd(CpuRegister dst, XmmRegister src, bool is64bit);
613 void cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit);
614 void cvtsi2ss(XmmRegister dst, const Address& src, bool is64bit);
616 void cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit);
617 void cvtsi2sd(XmmRegister dst, const Address& src, bool is64bit);
628 void cvttss2si(CpuRegister dst, XmmRegister src, bool is64bit);
630 void cvttsd2si(CpuRegister dst, XmmRegister src, bool is64bit);
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| D | assembler_x86_64.cc | 253 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit) { in cmov() argument
255 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex()); in cmov()
262 void X86_64Assembler::cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit) { in cmov() argument
264 if (is64bit) { in cmov()
744 void X86_64Assembler::movd(XmmRegister dst, CpuRegister src, bool is64bit) { in movd() argument
747 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex()); in movd()
753 void X86_64Assembler::movd(CpuRegister dst, XmmRegister src, bool is64bit) { in movd() argument
756 EmitOptionalRex(false, is64bit, src.NeedsRex(), false, dst.NeedsRex()); in movd()
2331 void X86_64Assembler::cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit) { in cvtsi2ss() argument
2334 if (is64bit) { in cvtsi2ss()
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| /art/compiler/optimizing/ |
| D | intrinsics_x86_64.cc | 140 static void MoveFPToInt(LocationSummary* locations, bool is64bit, X86_64Assembler* assembler) { in MoveFPToInt() argument
143 __ movd(output.AsRegister<CpuRegister>(), input.AsFpuRegister<XmmRegister>(), is64bit); in MoveFPToInt()
146 static void MoveIntToFP(LocationSummary* locations, bool is64bit, X86_64Assembler* assembler) { in MoveIntToFP() argument
149 __ movd(output.AsFpuRegister<XmmRegister>(), input.AsRegister<CpuRegister>(), is64bit); in MoveIntToFP()
212 bool is64bit, in GenIsInfinite() argument
221 if (is64bit) { in GenIsInfinite()
2389 bool is64bit, in GenCompareAndSetOrExchangeFP() argument
2398 DataType::Type type = is64bit ? DataType::Type::kUint64 : DataType::Type::kUint32; in GenCompareAndSetOrExchangeFP()
2412 if (is64bit) { in GenCompareAndSetOrExchangeFP()
2424 __ movd(out.AsFpuRegister<XmmRegister>(), CpuRegister(RAX), is64bit); in GenCompareAndSetOrExchangeFP()
[all …]
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| D | intrinsics_x86.cc | 170 static void CreateFPToIntLocations(ArenaAllocator* allocator, HInvoke* invoke, bool is64bit) { in CreateFPToIntLocations() argument
175 if (is64bit) { in CreateFPToIntLocations()
180 static void CreateIntToFPLocations(ArenaAllocator* allocator, HInvoke* invoke, bool is64bit) { in CreateIntToFPLocations() argument
185 if (is64bit) { in CreateIntToFPLocations()
191 static void MoveFPToInt(LocationSummary* locations, bool is64bit, X86Assembler* assembler) { in MoveFPToInt() argument
194 if (is64bit) { in MoveFPToInt()
206 static void MoveIntToFP(LocationSummary* locations, bool is64bit, X86Assembler* assembler) { in MoveIntToFP() argument
209 if (is64bit) { in MoveIntToFP()
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| D | intrinsics_arm64.cc | 185 static void MoveFPToInt(LocationSummary* locations, bool is64bit, MacroAssembler* masm) { in MoveFPToInt() argument
188 __ Fmov(is64bit ? XRegisterFrom(output) : WRegisterFrom(output), in MoveFPToInt()
189 is64bit ? DRegisterFrom(input) : SRegisterFrom(input)); in MoveFPToInt()
192 static void MoveIntToFP(LocationSummary* locations, bool is64bit, MacroAssembler* masm) { in MoveIntToFP() argument
195 __ Fmov(is64bit ? DRegisterFrom(output) : SRegisterFrom(output), in MoveIntToFP()
196 is64bit ? XRegisterFrom(input) : WRegisterFrom(input)); in MoveIntToFP()
3427 bool is64bit, in GenIsInfinite() argument
3433 if (is64bit) { in GenIsInfinite()
3443 MoveFPToInt(locations, is64bit, masm); in GenIsInfinite()
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| D | intrinsics_arm_vixl.cc | 224 static void MoveFPToInt(LocationSummary* locations, bool is64bit, ArmVIXLAssembler* assembler) { in MoveFPToInt() argument
227 if (is64bit) { in MoveFPToInt()
234 static void MoveIntToFP(LocationSummary* locations, bool is64bit, ArmVIXLAssembler* assembler) { in MoveIntToFP() argument
237 if (is64bit) { in MoveIntToFP()
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| /art/runtime/interpreter/ |
| D | unstarted_runtime.cc | 1817 jboolean is64bit = (pointer_size == PointerSize::k64) ? JNI_TRUE : JNI_FALSE; in UnstartedJNIVMRuntimeIs64Bit() local
1818 result->SetZ(is64bit); in UnstartedJNIVMRuntimeIs64Bit()
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