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/external/arm-trusted-firmware/docs/plat/
Dmt8192.rst5 The chip incorporates eight cores - four Cortex-A55 little cores and Cortex-A76.
7 Cortex-A55 can operate at up to 2 GHz.
Dmt8195.rst5 The chip incorporates eight cores - four Cortex-A55 little cores and Cortex-A76.
7 Cortex-A55 can operate at up to 2.0 GHz.
/external/arm-trusted-firmware/plat/arm/css/sgm/aarch64/
Dcss_sgm_helpers.S63 jump_if_cpu_midr CORTEX_A55_MIDR, A55
76 A55: label
/external/harfbuzz_ng/test/shape/data/text-rendering-tests/tests/
DSHLANA-2.tests29 …font-size=1000 --ned --remove-default-ignorables --font-funcs=ft;U+1A20,U+1A55,U+1A63,U+1A60,U+1A3…
30 …font-size=1000 --ned --remove-default-ignorables --font-funcs=ft;U+1A3B,U+1A55,U+1A75,U+1A63,U+1A7…
31 …font-size=1000 --ned --remove-default-ignorables --font-funcs=ft;U+1A20,U+1A55,U+1A6C,U+1A26;[uni1…
32 …font-size=1000 --ned --remove-default-ignorables --font-funcs=ft;U+1A48,U+1A55,U+1A6B,U+1A3E,U+1A6…
33 …font-size=1000 --ned --remove-default-ignorables --font-funcs=ft;U+1A48,U+1A55,U+1A60,U+1A45,U+1A6…
DSHLANA-6.tests2 …font-size=1000 --ned --remove-default-ignorables --font-funcs=ft;U+1A34,U+1A55,U+1A6F,U+1A60,U+1A2…
4 …font-size=1000 --ned --remove-default-ignorables --font-funcs=ft;U+1A37,U+1A55,U+1A70,U+1A34,U+1A6…
DSHLANA-10.tests4 …ze=1000 --ned --remove-default-ignorables --font-funcs=ft;U+1A2F,U+1A6A,U+1A55,U+1A63;[uni1A55|uni…
11 …font-size=1000 --ned --remove-default-ignorables --font-funcs=ft;U+1A3B,U+1A55,U+1A60,U+1A3F,U+1A6…
18 …e-default-ignorables --font-funcs=ft;U+1A46,U+1A63,U+1A48,U+1A60,U+1A32,U+1A55,U+1A7A;[uni1A46|uni…
19 …e-default-ignorables --font-funcs=ft;U+1A48,U+1A63,U+1A48,U+1A60,U+1A32,U+1A55,U+1A7C;[uni1A48|uni…
DSHLANA-5.tests7 …e-default-ignorables --font-funcs=ft;U+1A4B,U+1A6B,U+1A36,U+1A60,U+1A32,U+1A55,U+1A63,U+1A60,U+1A3…
DSHLANA-3.tests4 …font-size=1000 --ned --remove-default-ignorables --font-funcs=ft;U+1A20,U+1A55,U+1A63,U+1A60,U+1A3…
/external/arm-trusted-firmware/docs/design/
Dcpu-specific-build-macros.rst133 For Cortex-A55, the following errata build flags are defined :
135 - ``ERRATA_A55_768277``: This applies errata 768277 workaround to Cortex-A55
138 - ``ERRATA_A55_778703``: This applies errata 778703 workaround to Cortex-A55
141 - ``ERRATA_A55_798797``: This applies errata 798797 workaround to Cortex-A55
144 - ``ERRATA_A55_846532``: This applies errata 846532 workaround to Cortex-A55
147 - ``ERRATA_A55_903758``: This applies errata 903758 workaround to Cortex-A55
150 - ``ERRATA_A55_1221012``: This applies errata 1221012 workaround to Cortex-A55
154 revisions of Cortex-A55 CPU.
/external/cronet/buildtools/third_party/libc++/trunk/test/std/iterators/iterator.requirements/iterator.assoc.types/incrementable.traits/
Dincrementable_traits.compile.pass.cpp199 TEST_NOT_DIFFERENCE_TYPE(A55, const&&, &&);
/external/arm-trusted-firmware/docs/security_advisories/
Dsecurity-advisory-tfv-6.rst123 Cortex-A76, Cortex-A53, Cortex-A55, Cortex-A32, Cortex-A7 and Cortex-A5.
/external/OpenCSD/decoder/tests/snapshots/a55-test-tpiu/
Ddevice1.ini4 type=Cortex-A55
/external/cpuinfo/
DREADME.md275 - [x] ARM-designed ARM cores (up to Cortex-A55, Cortex-A77, and Neoverse E1/N1/V1/N2)
/external/XNNPACK/src/qu8-igemm/gen/
D4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S42 # x11 temp for Cortex-A55 loads
/external/XNNPACK/src/qu8-gemm/gen/
D4x8c4-minmax-rndnu-aarch64-neondot-cortex-a55.S40 # x14 temp for Cortex-A55 loads
/external/apache-commons-lang/src/test/java/org/apache/commons/lang3/
DEnumUtilsTest.java40 A46, A47, A48, A49, A50, A51, A52, A53, A54, A55, A56, A57, A58, A59, A60, A61, A62, A63 enumConstant
/external/XNNPACK/src/qu8-gemm/
D4x8c4-aarch64-neondot-cortex-a55.S.in38 # x14 temp for Cortex-A55 loads
/external/XNNPACK/src/qu8-igemm/
D4x8c4-aarch64-neondot-cortex-a55.S.in40 # x11 temp for Cortex-A55 loads
/external/XNNPACK/src/qc8-igemm/gen/
D4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S41 # x11 temp for Cortex-A55 loads
/external/XNNPACK/src/qc8-gemm/gen/
D4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S39 # x14 temp for Cortex-A55 loads
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64.td481 "Cortex-A55 ARM processors", [
/external/XNNPACK/src/qs8-gemm/gen/
D4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S39 # x14 temp for Cortex-A55 loads
D4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S39 # x14 temp for Cortex-A55 loads
/external/XNNPACK/src/qs8-igemm/gen/
D4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S41 # x11 temp for Cortex-A55 loads
D4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S41 # x11 temp for Cortex-A55 loads

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