| /external/OpenCSD/decoder/tests/snapshots/tc2-ptm-rstk-t32/ds-5_trace_dump/ |
| D | a15_rs.txt | 110 S:0x80000F7E 1C4A ADDS r2,r1,#1
124 S:0x80000F7E 1C4A ADDS r2,r1,#1
133 S:0x8000092A 19B8 ADDS r0,r7,r6
142 S:0x80000F7E 1C4A ADDS r2,r1,#1
174 S:0x80000F7E 1C4A ADDS r2,r1,#1
250 S:0x80000EF6 197A ADDS r2,r7,r5
286 S:0x800007F6 1C40 ADDS r0,r0,#1
298 S:0x800007F6 1C40 ADDS r0,r0,#1
310 S:0x800007F6 1C40 ADDS r0,r0,#1
322 S:0x800007F6 1C40 ADDS r0,r0,#1
[all …]
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| /external/vixl/test/aarch32/config/ |
| D | cond-rdlow-rnlow-operand-immediate-t32.json | 37 "Adds", // ADDS{<q>} <Rd>, <Rn>, #<imm3> ; T1
38 // ADDS{<q>} <Rdn>, #<imm8> ; T2
39 // ADDS{<q>} {<Rdn>}, <Rdn>, #<imm8> ; T2
136 "Adds", // ADDS{<q>} {<Rdn>}, <Rdn>, #<imm8> ; T2
174 "Adds", // ADDS{<q>} <Rd>, <Rn>, #<imm3> ; T1
|
| D | cond-rd-rn-operand-const-a32.json | 34 "Adds", // ADDS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; A1
35 // ADDS{<c>}{<q>} {<Rd>}, SP, #<const> ; A1
|
| D | cond-rd-rn-operand-const-t32.json | 40 "Adds", // ADDS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T3
41 // ADDS{<c>}{<q>} {<Rd>}, SP, #<const> ; T3
|
| D | cond-rd-rn-operand-rm-shift-amount-1to32-a32.json | 33 "Adds", // ADDS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
34 // ADDS{<c>}{<q>} {<Rd>}, SP, <Rm> {, <shift> #<amount> } ; A1
|
| D | cond-rd-rn-operand-rm-shift-amount-1to31-a32.json | 33 "Adds", // ADDS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
34 // ADDS{<c>}{<q>} {<Rd>}, SP, <Rm> {, <shift> #<amount> } ; A1
|
| D | cond-rd-rn-operand-rm-shift-amount-1to32-t32.json | 37 "Adds", // ADDS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T3
38 // ADDS{<c>}{<q>} {<Rd>}, SP, <Rm> {, <shift> #<amount> } ; T3
|
| D | cond-rd-rn-operand-rm-shift-amount-1to31-t32.json | 37 "Adds", // ADDS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T3
38 // ADDS{<c>}{<q>} {<Rd>}, SP, <Rm> {, <shift> #<amount> } ; T3
|
| D | cond-rd-rn-operand-rm-t32.json | 59 "Adds", // ADDS{<q>} {<Rd>}, <Rn>, <Rm> ; T1
60 // ADDS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T3
61 // ADDS{<c>}{<q>} {<Rd>}, SP, <Rm> {, <shift> #<amount> } ; T3
|
| D | cond-rd-rn-operand-rm-a32.json | 42 "Adds", // ADDS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
43 // ADDS{<c>}{<q>} {<Rd>}, SP, <Rm> {, <shift> #<amount> } ; A1
|
| D | cond-rd-rn-operand-rm-shift-rs-a32.json | 32 "Adds", // ADDS{<c>}{<q>} {<Rd>}, <Rn>, <Rm>, <shift> <Rs> ; A1
|
| /external/libopus/celt/arm/ |
| D | celt_pitch_xcorr_arm.s | 122 ADDS r12, r12, #2
141 ADDS r12, r12, #1
310 ADDS r2, r2, #4
394 ADDS r12, r12, #4
441 ADDS r1, r1, #2
467 ADDS r12, r12, #2
480 ADDS r12, r12, #1
506 ADDS r1, r1, #1
528 ADDS r12, r12, #2
535 ADDS r12, r12, #1
|
| D | celt_pitch_xcorr_arm_gnu.s | 125 ADDS r12, r12, #2
144 ADDS r12, r12, #1
313 ADDS r2, r2, #4
397 ADDS r12, r12, #4
444 ADDS r1, r1, #2
470 ADDS r12, r12, #2
483 ADDS r12, r12, #1
509 ADDS r1, r1, #1
531 ADDS r12, r12, #2
538 ADDS r12, r12, #1
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| /external/OpenCSD/decoder/tests/snapshots/TC2/ds5-dumps/ |
| D | etmv3_0x12.txt | 9 Instruction 4 S:0xC003F608 0x18D3 4 ADDS r3,r2,r3 false
24 Instruction 19 S:0xC003F350 0x189A 1 ADDS r2,r3,r2 false
26 Instruction 21 S:0xC003F356 0x1989 1 ADDS r1,r1,r6 false
38 Instruction 33 S:0xC003F39C 0x18D3 1 ADDS r3,r2,r3 false
41 Instruction 36 S:0xC003F3A6 0x1992 2 ADDS r2,r2,r6 false
214 Instruction 198 S:0xC003B7C4 0x1812 1 ADDS r2,r2,r0 false
237 Instruction 221 S:0xC003BCF4 0x199B 1 ADDS r3,r3,r6 false
252 Instruction 236 S:0xC003BD50 0x18E3 1 ADDS r3,r4,r3 false
254 Instruction 238 S:0xC003BD54 0x3601 0 ADDS r6,#1 false
270 Instruction 254 S:0xC003BD50 0x18E3 1 ADDS r3,r4,r3 false
[all …]
|
| D | etmv3_0x11.txt | 35 Instruction 31 S:0xC005097E 0x3301 2 ADDS r3,#1 false
87 Instruction 81 S:0xC00509AA 0x3301 2 ADDS r3,#1 false
115 Instruction 107 S:0xC00555FE 0x1812 2 ADDS r2,r2,r0 false
120 Instruction 112 S:0xC0055610 0x3301 2 ADDS r3,#1 false
124 Instruction 116 S:0xC005561E 0x3301 2 ADDS r3,#1 false
162 Instruction 154 S:0xC003F608 0x18D3 4 ADDS r3,r2,r3 false
177 Instruction 169 S:0xC003F350 0x189A 1 ADDS r2,r3,r2 false
179 Instruction 171 S:0xC003F356 0x1989 1 ADDS r1,r1,r6 false
191 Instruction 183 S:0xC003F39C 0x18D3 1 ADDS r3,r2,r3 false
194 Instruction 186 S:0xC003F3A6 0x1992 2 ADDS r2,r2,r6 false
[all …]
|
| D | etmv3_0x10.txt | 71 Instruction 62 S:0xC004F002 0x19A4 2 ADDS r4,r4,r6 false
144 Instruction 131 S:0xC0021130 0x181B 2 ADDS r3,r3,r0 false
238 Instruction 216 S:0xC004F002 0x19A4 2 ADDS r4,r4,r6 false
300 Instruction 276 S:0xC0021130 0x181B 2 ADDS r3,r3,r0 false
327 Instruction 301 S:0xC0021130 0x181B 2 ADDS r3,r3,r0 false
354 Instruction 326 S:0xC0025DDC 0x18CD 1 ADDS r5,r1,r3 false fail
428 Instruction 398 S:0xC003CF1E 0x189B 2 ADDS r3,r3,r2 false
453 Instruction 423 S:0xC0025E56 0x3301 2 ADDS r3,#1 false
485 Instruction 453 S:0xC0024C2A 0x3014 1 ADDS r0,r0,#0x14 false
503 Instruction 471 S:0xC00259F4 0x3301 2 ADDS r3,#1 false
[all …]
|
| D | ptmv1_0x13.txt | 42 Instruction 29 S:0xC0018DB4 0x3301 0 ADDS r3,#1 false
196 Instruction 173 S:0xC004F568 0x1912 0 ADDS r2,r2,r4 false
224 Instruction 199 S:0xC004F5C0 0x1880 0 ADDS r0,r0,r2 false
238 Instruction 213 S:0xC004F5F0 0xEB120208 0 ADDS r2,r2,r8 false
266 Instruction 241 S:0xC005537A 0x1C15 0 ADDS r5,r2,#0 false
319 Instruction 294 S:0xC004F568 0x1912 0 ADDS r2,r2,r4 false
347 Instruction 320 S:0xC004F5C0 0x1880 0 ADDS r0,r0,r2 false
361 Instruction 334 S:0xC004F5F0 0xEB120208 0 ADDS r2,r2,r8 false
544 Instruction 509 S:0xC00121F8 0x3701 0 ADDS r7,#1 false
562 Instruction 526 S:0xC001220A 0x3401 0 ADDS r4,#1 false
[all …]
|
| /external/tremolo/Tremolo/ |
| D | bitwiseARM.s | 73 ADDS r10,r2,r1 @ r10= bitsLeftInSegment + bits (i.e.
156 ADDS r14,r14,r10 @ r14= length in bits-bits to skip
201 ADDS r10,r10,r2 @ r10= bits left in word after skip
205 ADDS r2,r2,r12,LSL #3 @ r2 = length in bits after advance
265 ADDS r10,r2,r1 @ r10= bitsLeftInSegment + bits (i.e.
396 ADDS r14,r14,r10 @ r14= length in bits-bits to skip
|
| D | dpen.s | 108 ADDS r1, r1, #1 @ r1 = i-read++ (i-read<0 => i<read)
133 ADDS r1, r1, #1 @ r1 = i++
165 ADDS r1, r1, #1 @ r1 = i-read++ (i-read<0 => i<read)
191 ADDS r1, r1, #1 @ r1 = i++
223 ADDS r1, r1, #1 @ r1 = i-read++ (i-read<0 => i<read)
|
| /external/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 281 X86_INTRINSIC_DATA(avx2_padds_b, INTR_TYPE_2OP, X86ISD::ADDS, 0),
282 X86_INTRINSIC_DATA(avx2_padds_w, INTR_TYPE_2OP, X86ISD::ADDS, 0),
866 X86_INTRINSIC_DATA(avx512_mask_padds_b_128, INTR_TYPE_2OP_MASK, X86ISD::ADDS, 0),
867 X86_INTRINSIC_DATA(avx512_mask_padds_b_256, INTR_TYPE_2OP_MASK, X86ISD::ADDS, 0),
868 X86_INTRINSIC_DATA(avx512_mask_padds_b_512, INTR_TYPE_2OP_MASK, X86ISD::ADDS, 0),
869 X86_INTRINSIC_DATA(avx512_mask_padds_w_128, INTR_TYPE_2OP_MASK, X86ISD::ADDS, 0),
870 X86_INTRINSIC_DATA(avx512_mask_padds_w_256, INTR_TYPE_2OP_MASK, X86ISD::ADDS, 0),
871 X86_INTRINSIC_DATA(avx512_mask_padds_w_512, INTR_TYPE_2OP_MASK, X86ISD::ADDS, 0),
1892 X86_INTRINSIC_DATA(sse2_padds_b, INTR_TYPE_2OP, X86ISD::ADDS, 0),
1893 X86_INTRINSIC_DATA(sse2_padds_w, INTR_TYPE_2OP, X86ISD::ADDS, 0),
|
| /external/llvm/test/MC/ARM/ |
| D | thumb2-narrow-dp.ll | 15 ADDS r0, r0, #5 // T1
17 ADDS r1, r1, #8 // T2
19 ADDS.W r1, r1, #8 // .w => T3
21 ADDS r8, r8, #8 // T3
43 ADDS r0, r2, r1 // ADDS has T1 narrow 3 operand
45 ADDS r2, r2, r1 // ADDS has T1 narrow 3 operand
|
| /external/XNNPACK/src/qs8-gemm/gen/ |
| D | 1x8-minmax-rndnu-aarch32-neon-mlal-lane-prfm-cortex-a7.S | 189 ADDS r5, r5, 8
|
| D | 4x8c4-minmax-rndnu-aarch32-neondot-ld64.S | 138 ADDS r5, r5, 8
|
| /external/XNNPACK/src/qc8-gemm/gen/ |
| D | 1x8-minmax-fp32-aarch32-neon-mlal-lane-cortex-a7.S | 180 ADDS r5, r5, 8
|
| D | 1x8-minmax-fp32-aarch32-neon-mlal-lane-prfm-cortex-a7.S | 188 ADDS r5, r5, 8
|