| /external/llvm/test/CodeGen/X86/ |
| D | 2010-03-05-ConstantFoldCFG.ll | 3 ; When BRCOND is constant-folded to BR, make sure that PHI nodes don't get
|
| /external/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.h | 50 BRCOND, enumerator
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 574 BRCOND, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.h | 52 BRCOND, enumerator
|
| D | AVRISelLowering.cpp | 100 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in AVRTargetLowering()
263 NODE(BRCOND); in getTargetNodeName()
630 return DAG.getNode(AVRISD::BRCOND, dl, MVT::Other, Chain, Dest, TargetCC, in LowerBR_CC()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 702 BRCOND, enumerator
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 130 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in SITargetLowering()
1232 case ISD::BRCOND: return LowerBRCOND(Op, DAG); in LowerOperation()
1360 SDValue SITargetLowering::LowerBRCOND(SDValue BRCOND, in LowerBRCOND() argument
1363 SDLoc DL(BRCOND); in LowerBRCOND()
1365 SDNode *Intr = BRCOND.getOperand(1).getNode(); in LowerBRCOND()
1366 SDValue Target = BRCOND.getOperand(2); in LowerBRCOND()
1377 BR = findUser(BRCOND, ISD::BR); in LowerBRCOND()
1383 return BRCOND; in LowerBRCOND()
1396 Ops.push_back(BRCOND.getOperand(0)); in LowerBRCOND()
1409 BRCOND.getOperand(2) in LowerBRCOND()
|
| D | AMDGPUISelDAGToDAG.cpp | 42 assert(N->getOpcode() == ISD::BRCOND); in isCBranchSCC()
473 case ISD::BRCOND: in Select()
|
| D | R600ISelLowering.cpp | 115 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in R600TargetLowering()
636 case ISD::BRCOND: return LowerBRCOND(Op, DAG); in LowerOperation()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 42 BRCOND, // Conditional branch instruction; "b.cond". enumerator
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 46 BRCOND, // Conditional branch. enumerator
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 282 case ISD::BRCOND: return "brcond"; in getOperationName()
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 119 BRCOND, enumerator
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 69 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in BPFTargetLowering()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 71 BRCOND, // Conditional branch. enumerator
|
| D | ARMISelLowering.cpp | 752 setTargetDAGCombine(ISD::BRCOND); in ARMTargetLowering()
1314 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in ARMTargetLowering()
1553 case ARMISD::BRCOND: return "ARMISD::BRCOND"; in getTargetNodeName()
5189 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in OptimizeVFPBrcond()
5239 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, CCR, in LowerBRCOND()
5293 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, CCR, in LowerBR_CC()
5301 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in LowerBR_CC()
5320 SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
5324 Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
9297 case ISD::BRCOND: return LowerBRCOND(Op, DAG); in LowerOperation()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 42 BRCOND, // Conditional branch instruction; "b.cond". enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 358 case ISD::BRCOND: return "brcond"; in getOperationName()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 74 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in BPFTargetLowering()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
| D | ARCISelLowering.cpp | 118 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in ARCTargetLowering()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 237 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in SITargetLowering()
4038 case ISD::BRCOND: return LowerBRCOND(Op, DAG); in LowerOperation()
4456 SDValue SITargetLowering::LowerBRCOND(SDValue BRCOND, in LowerBRCOND() argument
4458 SDLoc DL(BRCOND); in LowerBRCOND()
4460 SDNode *Intr = BRCOND.getOperand(1).getNode(); in LowerBRCOND()
4461 SDValue Target = BRCOND.getOperand(2); in LowerBRCOND()
4472 BR = findUser(BRCOND, ISD::BR); in LowerBRCOND()
4486 return BRCOND; in LowerBRCOND()
4500 Ops.push_back(BRCOND.getOperand(0)); in LowerBRCOND()
4513 BRCOND.getOperand(0) in LowerBRCOND()
[all …]
|
| D | R600ISelLowering.cpp | 152 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in R600TargetLowering()
499 case ISD::BRCOND: return LowerBRCOND(Op, DAG); in LowerOperation()
|
| D | AMDGPUISelDAGToDAG.cpp | 901 case ISD::BRCOND: in Select()
2030 assert(N->getOpcode() == ISD::BRCOND); in isCBranchSCC()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 114 BRCOND, enumerator
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 107 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in MSP430TargetLowering()
|