| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 2880 auto BuildVec = MIRBuilder.buildBuildVector(NarrowTy, SubBuildVector); in fewerElementsVectorBuildVector() local
2881 ConcatOps.push_back(BuildVec.getReg(0)); in fewerElementsVectorBuildVector()
4224 SmallVector<Register, 32> BuildVec; in lowerShuffleVector() local
4231 BuildVec.push_back(Undef); in lowerShuffleVector()
4236 BuildVec.push_back(Idx == 0 ? Src0Reg : Src1Reg); in lowerShuffleVector()
4243 BuildVec.push_back(Extract.getReg(0)); in lowerShuffleVector()
4247 MIRBuilder.buildBuildVector(DstReg, BuildVec); in lowerShuffleVector()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 2385 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {Hi, NewShift}); in performSraCombine() local
2386 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildVec); in performSraCombine()
2394 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {NewShift, NewShift}); in performSraCombine() local
2395 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildVec); in performSraCombine()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 4904 SDValue BuildVec = DAG.getBuildVector(ResVT, DL, ScalarRes); in ReplaceLoadVector() local
4906 Results.push_back(BuildVec); in ReplaceLoadVector()
5016 SDValue BuildVec = in ReplaceINTRINSIC_W_CHAIN() local
5019 Results.push_back(BuildVec); in ReplaceINTRINSIC_W_CHAIN()
|
| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 4382 SDValue BuildVec = DAG.getBuildVector(ResVT, DL, ScalarRes); in ReplaceLoadVector() local
4384 Results.push_back(BuildVec); in ReplaceLoadVector()
4494 SDValue BuildVec = in ReplaceINTRINSIC_W_CHAIN() local
4497 Results.push_back(BuildVec); in ReplaceINTRINSIC_W_CHAIN()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 3797 SDValue BuildVec = DAG.getConstant(EltMask, DL, VecVT); in LowerFCOPYSIGN() local
3802 BuildVec = DAG.getNode(ISD::BITCAST, DL, MVT::v2f64, BuildVec); in LowerFCOPYSIGN()
3803 BuildVec = DAG.getNode(ISD::FNEG, DL, MVT::v2f64, BuildVec); in LowerFCOPYSIGN()
3804 BuildVec = DAG.getNode(ISD::BITCAST, DL, MVT::v2i64, BuildVec); in LowerFCOPYSIGN()
3808 DAG.getNode(AArch64ISD::BIT, DL, VecVT, VecVal1, VecVal2, BuildVec); in LowerFCOPYSIGN()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 3132 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {Hi, NewShift}); in performSraCombine() local
3133 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildVec); in performSraCombine()
3141 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {NewShift, NewShift}); in performSraCombine() local
3142 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildVec); in performSraCombine()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 5132 SDValue BuildVec = DAG.getConstant(EltMask, DL, VecVT); in LowerFCOPYSIGN() local
5137 BuildVec = DAG.getNode(ISD::BITCAST, DL, MVT::v2f64, BuildVec); in LowerFCOPYSIGN()
5138 BuildVec = DAG.getNode(ISD::FNEG, DL, MVT::v2f64, BuildVec); in LowerFCOPYSIGN()
5139 BuildVec = DAG.getNode(ISD::BITCAST, DL, MVT::v2i64, BuildVec); in LowerFCOPYSIGN()
5143 DAG.getNode(AArch64ISD::BIT, DL, VecVT, VecVal1, VecVal2, BuildVec); in LowerFCOPYSIGN()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 18620 SDValue BuildVec = DAG.getBuildVector( in visitEXTRACT_SUBVECTOR() local
18622 return DAG.getBitcast(NVT, BuildVec); in visitEXTRACT_SUBVECTOR()
|