| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 4813 c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2),
4814 NoItinerary, "cdp", "\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
4815 [(int_arm_cdp imm:$cop, imm:$opc1, imm:$CRd, imm:$CRn,
4820 bits<4> CRd;
4829 let Inst{15-12} = CRd;
4835 c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2),
4836 NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
4837 [(int_arm_cdp2 imm:$cop, imm:$opc1, imm:$CRd, imm:$CRn,
4843 bits<4> CRd;
4852 let Inst{15-12} = CRd;
[all …]
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| D | ARMInstrThumb2.td | 3936 (outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr),
3937 asm, "\t$cop, $CRd, $addr", pattern> {
3940 bits<4> CRd;
3947 let Inst{15-12} = CRd;
3953 (outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5_pre:$addr),
3954 asm, "\t$cop, $CRd, $addr!", []> {
3957 bits<4> CRd;
3964 let Inst{15-12} = CRd;
3970 (outs), (ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$addr,
3972 asm, "\t$cop, $CRd, $addr, $offset", []> {
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 5158 c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2),
5159 NoItinerary, "cdp", "\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
5160 [(int_arm_cdp timm:$cop, timm:$opc1, timm:$CRd, timm:$CRn,
5165 bits<4> CRd;
5174 let Inst{15-12} = CRd;
5182 c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2),
5183 NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
5184 [(int_arm_cdp2 timm:$cop, timm:$opc1, timm:$CRd, timm:$CRn,
5190 bits<4> CRd;
5199 let Inst{15-12} = CRd;
[all …]
|
| D | ARMInstrThumb2.td | 4168 (outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr),
4169 asm, "\t$cop, $CRd, $addr", pattern> {
4172 bits<4> CRd;
4179 let Inst{15-12} = CRd;
4185 (outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5_pre:$addr),
4186 asm, "\t$cop, $CRd, $addr!", []> {
4189 bits<4> CRd;
4196 let Inst{15-12} = CRd;
4202 (outs), (ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$addr,
4204 asm, "\t$cop, $CRd, $addr, $offset", []> {
[all …]
|
| /external/capstone/arch/ARM/ |
| D | ARMDisassembler.c | 1379 unsigned CRd = fieldFromInstruction_4(Insn, 12, 4); in DecodeCopMemInstruction() local
1426 MCOperand_CreateImm0(Inst, CRd); in DecodeCopMemInstruction()
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenDAGISel.inc | 31078 /* 66514*/ OPC_RecordChild4, // #3 = $CRd
31101 … }, (timm:{ *:[i32] }):$cop, (timm:{ *:[i32] }):$opc1, (timm:{ *:[i32] }):$CRd, (timm:{ *:[i32] })…
31102 …CDP (timm:{ *:[i32] }):$cop, (timm:{ *:[i32] }):$opc1, (timm:{ *:[i32] }):$CRd, (timm:{ *:[i32] })…
31110 … }, (timm:{ *:[i32] }):$cop, (timm:{ *:[i32] }):$opc1, (timm:{ *:[i32] }):$CRd, (timm:{ *:[i32] })…
31111 …CDP (timm:{ *:[i32] }):$cop, (timm:{ *:[i32] }):$opc1, (timm:{ *:[i32] }):$CRd, (timm:{ *:[i32] })…
31123 /* 66602*/ OPC_RecordChild4, // #3 = $CRd
31144 … }, (timm:{ *:[i32] }):$cop, (timm:{ *:[i32] }):$opc1, (timm:{ *:[i32] }):$CRd, (timm:{ *:[i32] })…
31145 …DP2 (timm:{ *:[i32] }):$cop, (timm:{ *:[i32] }):$opc1, (timm:{ *:[i32] }):$CRd, (timm:{ *:[i32] })…
31153 … }, (timm:{ *:[i32] }):$cop, (timm:{ *:[i32] }):$opc1, (timm:{ *:[i32] }):$CRd, (timm:{ *:[i32] })…
31154 …DP2 (timm:{ *:[i32] }):$cop, (timm:{ *:[i32] }):$opc1, (timm:{ *:[i32] }):$CRd, (timm:{ *:[i32] })…
[all …]
|
| D | ARMGenMCCodeEmitter.inc | 11758 // op: CRd
12634 // op: CRd
12654 // op: CRd
12722 // op: CRd
14884 // op: CRd
15019 // op: CRd
15049 // op: CRd
15867 // op: CRd
|
| D | ARMGenGlobalISel.inc | 31000 // MIs[0] CRd
31008 …CRd, (timm:{ *:[i32] }):$CRn, (timm:{ *:[i32] }):$CRm, (timm:{ *:[i32] }):$opc2) => (CDP (timm:{…
31012 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // CRd
31031 // MIs[0] CRd
31039 …CRd, (timm:{ *:[i32] }):$CRn, (timm:{ *:[i32] }):$CRm, (timm:{ *:[i32] }):$opc2) => (CDP2 (timm:…
31043 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // CRd
31060 // MIs[0] CRd
31068 …CRd, (timm:{ *:[i32] }):$CRn, (timm:{ *:[i32] }):$CRm, (timm:{ *:[i32] }):$opc2) => (t2CDP (timm…
31072 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // CRd
31091 // MIs[0] CRd
[all …]
|
| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 1326 unsigned CRd = fieldFromInstruction(Insn, 12, 4); in DecodeCopMemInstruction() local
1378 Inst.addOperand(MCOperand::createImm(CRd)); in DecodeCopMemInstruction()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 1649 unsigned CRd = fieldFromInstruction(Insn, 12, 4); in DecodeCopMemInstruction() local
1730 Inst.addOperand(MCOperand::createImm(CRd)); in DecodeCopMemInstruction()
|