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Searched refs:CTX_GPREG_X1 (Results 1 – 12 of 12) sorted by relevance

/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/mce/
Dmce.c209 write_ctx_reg(gp_regs, CTX_GPREG_X1, (ret64)); in mce_command_handler()
223 write_ctx_reg(gp_regs, CTX_GPREG_X1, (uint64_t)(ret)); in mce_command_handler()
231 write_ctx_reg(gp_regs, CTX_GPREG_X1, (uint64_t)(ret)); in mce_command_handler()
251 write_ctx_reg(gp_regs, CTX_GPREG_X1, ((ret64 == arg0) ? in mce_command_handler()
266 write_ctx_reg(gp_regs, CTX_GPREG_X1, (ret64)); in mce_command_handler()
276 write_ctx_reg(gp_regs, CTX_GPREG_X1, (ret64)); in mce_command_handler()
299 write_ctx_reg(gp_regs, CTX_GPREG_X1, (ret64)); in mce_command_handler()
309 write_ctx_reg(gp_regs, CTX_GPREG_X1, (ret64)); in mce_command_handler()
337 write_ctx_reg(gp_regs, CTX_GPREG_X1, (arg1)); in mce_command_handler()
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t194/
Dplat_sip_calls.c68 write_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X1, per[0]); in plat_sip_handler()
91 write_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X1, local_x1); in plat_sip_handler()
/external/arm-trusted-firmware/include/arch/aarch64/
Dsmccc_helpers.h27 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X1), (_x1)); \
79 _x1 = read_ctx_reg(regs, CTX_GPREG_X1); \
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t210/
Dplat_sip_calls.c87 write_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X1, val); in plat_sip_handler()
/external/arm-trusted-firmware/plat/nvidia/tegra/common/
Dtegra_fiq_glue.c140 write_ctx_reg((gpregs_ctx), (uint32_t)(CTX_GPREG_X1), (fiq_state[cpu].spsr_el3)); in tegra_fiq_get_intr_context()
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/
Dplat_sip_calls.c146 CTX_GPREG_X1, (core_clk_ctr)); in plat_sip_handler()
/external/arm-trusted-firmware/services/std_svc/spmd/
Dspmd_pm.c30 write_ctx_reg(gpregs, CTX_GPREG_X1, in spmd_build_spmc_message()
Dspmd_main.c202 write_ctx_reg(gpregs, CTX_GPREG_X1, 0); in spmd_secure_interrupt_handler()
/external/arm-trusted-firmware/include/lib/el3_runtime/aarch64/
Dcontext.h18 #define CTX_GPREG_X1 U(0x8) macro
480 write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X1, x1); \
/external/arm-trusted-firmware/services/std_svc/spm_mm/
Dspm_mm_main.c199 write_ctx_reg(get_gpregs_ctx(cpu_ctx), CTX_GPREG_X1, x1); in spm_mm_sp_call()
/external/arm-trusted-firmware/plat/qti/qtiseclib/src/
Dqtiseclib_cb_interface.c151 qti_ns_ctx->x1 = read_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X1); in qtiseclib_cb_get_ns_ctx()
/external/arm-trusted-firmware/services/std_svc/sdei/
Dsdei_intr_mgmt.c329 SMC_SET_GP(ctx, CTX_GPREG_X1, se->arg); in setup_ns_dispatch()