Searched refs:CondRegs (Results 1 – 2 of 2) sorted by relevance
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86FlagsCopyLowering.cpp | 106 X86::CondCode Cond, CondRegArray &CondRegs);
113 CondRegArray &CondRegs);
117 CondRegArray &CondRegs);
121 CondRegArray &CondRegs);
124 MachineInstr &JmpI, CondRegArray &CondRegs);
130 MachineOperand &FlagUse, CondRegArray &CondRegs);
134 CondRegArray &CondRegs);
537 CondRegArray CondRegs = collectCondsInRegs(*TestMBB, TestPos); in runOnMachineFunction() local
621 rewriteCMov(*TestMBB, TestPos, TestLoc, MI, *FlagUse, CondRegs); in runOnMachineFunction()
623 rewriteFCMov(*TestMBB, TestPos, TestLoc, MI, *FlagUse, CondRegs); in runOnMachineFunction()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPURegisterBankInfo.cpp | 1565 SmallVector<Register, 1> CondRegs(OpdMapper.getVRegs(1)); in applyMappingImpl() local
1566 if (CondRegs.empty()) in applyMappingImpl()
1567 CondRegs.push_back(MI.getOperand(1).getReg()); in applyMappingImpl()
1569 assert(CondRegs.size() == 1); in applyMappingImpl()
1572 const RegisterBank *CondBank = getRegBank(CondRegs[0], MRI, *TRI); in applyMappingImpl()
1580 B.buildZExt(NewCondReg, CondRegs[0]); in applyMappingImpl()
1612 B.buildSelect(DefRegs[0], CondRegs[0], Src1Regs[0], Src2Regs[0]); in applyMappingImpl()
1613 B.buildSelect(DefRegs[1], CondRegs[0], Src1Regs[1], Src2Regs[1]); in applyMappingImpl()
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