| /external/llvm/lib/CodeGen/ |
| D | MachineTraceMetrics.cpp | 607 unsigned DefOp; member
610 DataDep(const MachineInstr *DefMI, unsigned DefOp, unsigned UseOp) in DataDep()
611 : DefMI(DefMI), DefOp(DefOp), UseOp(UseOp) {} in DataDep()
620 DefOp = DefI.getOperandNo(); in DataDep()
736 for (unsigned DefOp : LiveDefOps) { in updatePhysDepsDownwards() local
737 for (MCRegUnitIterator Units(UseMI->getOperand(DefOp).getReg(), TRI); in updatePhysDepsDownwards()
741 LRU.Op = DefOp; in updatePhysDepsDownwards()
847 .computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI, Dep.UseOp); in computeInstrDepths()
935 UseHeight += SchedModel.computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI, in pushDepHeight()
955 addLiveIns(const MachineInstr *DefMI, unsigned DefOp, in addLiveIns() argument
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MachineTraceMetrics.cpp | 629 unsigned DefOp; member
632 DataDep(const MachineInstr *DefMI, unsigned DefOp, unsigned UseOp) in DataDep()
633 : DefMI(DefMI), DefOp(DefOp), UseOp(UseOp) {} in DataDep()
642 DefOp = DefI.getOperandNo(); in DataDep()
742 for (unsigned DefOp : LiveDefOps) { in updatePhysDepsDownwards() local
743 for (MCRegUnitIterator Units(UseMI->getOperand(DefOp).getReg(), TRI); in updatePhysDepsDownwards()
747 LRU.Op = DefOp; in updatePhysDepsDownwards()
805 .computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI, Dep.UseOp); in updateDepth()
959 UseHeight += SchedModel.computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI, in pushDepHeight()
979 addLiveIns(const MachineInstr *DefMI, unsigned DefOp, in addLiveIns() argument
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| D | PeepholeOptimizer.cpp | 1521 MachineOperand &DefOp = MI.getOperand(0); in findTargetRecurrence() local
1522 if (!isVirtualRegisterOperand(DefOp)) in findTargetRecurrence()
1534 return findTargetRecurrence(DefOp.getReg(), TargetRegs, RC); in findTargetRecurrence()
1540 return findTargetRecurrence(DefOp.getReg(), TargetRegs, RC); in findTargetRecurrence()
1839 const MachineOperand DefOp = Def->getOperand(DefIdx); in getNextSourceFromBitcast() local
1840 if (DefOp.getSubReg() != DefSubReg) in getNextSourceFromBitcast()
1868 for (const MachineInstr &UseMI : MRI.use_nodbg_instructions(DefOp.getReg())) { in getNextSourceFromBitcast()
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| D | SplitKit.cpp | 439 for (const MachineOperand &DefOp : DefMI->defs()) { in addDeadDef() local
440 Register R = DefOp.getReg(); in addDeadDef()
443 if (unsigned SR = DefOp.getSubReg()) in addDeadDef()
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| D | MachinePipeliner.cpp | 353 MachineOperand &DefOp = PI.getOperand(0); in preprocessPhiNodes() local
354 assert(DefOp.getSubReg() == 0); in preprocessPhiNodes()
355 auto *RC = MRI.getRegClass(DefOp.getReg()); in preprocessPhiNodes()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonExpandCondsets.cpp | 261 void predicateAt(const MachineOperand &DefOp, MachineInstr &MI,
854 void HexagonExpandCondsets::predicateAt(const MachineOperand &DefOp, in predicateAt() argument
885 MB.addReg(DefOp.getReg(), getRegState(DefOp), DefOp.getSubReg()); in predicateAt()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonExpandCondsets.cpp | 224 void predicateAt(const MachineOperand &DefOp, MachineInstr &MI,
854 void HexagonExpandCondsets::predicateAt(const MachineOperand &DefOp, in predicateAt() argument
885 MB.addReg(DefOp.getReg(), getRegState(DefOp), DefOp.getSubReg()); in predicateAt()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86DomainReassignment.cpp | 592 for (auto &DefOp : UseMI.defs()) { in buildClosure() local
593 if (!DefOp.isReg()) in buildClosure()
596 Register DefReg = DefOp.getReg(); in buildClosure()
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| D | X86SpeculativeLoadHardening.cpp | 1593 if (MachineOperand *DefOp = MI.findRegisterDefOperand(X86::EFLAGS)) { in isEFLAGSLive() local
1595 if (DefOp->isDead()) in isEFLAGSLive()
2334 auto &DefOp = MI.getOperand(0); in hardenPostLoad() local
2335 Register OldDefReg = DefOp.getReg(); in hardenPostLoad()
2342 DefOp.setReg(UnhardenedReg); in hardenPostLoad()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineTraceMetrics.h | 315 void addLiveIns(const MachineInstr *DefMI, unsigned DefOp,
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | MachineTraceMetrics.h | 335 void addLiveIns(const MachineInstr *DefMI, unsigned DefOp,
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 629 MachineOperand &DefOp = Def->getOperand(1); in copyPhysReg() local
630 assert(DefOp.isReg() || DefOp.isImm()); in copyPhysReg()
632 if (DefOp.isReg()) { in copyPhysReg()
637 if (I->modifiesRegister(DefOp.getReg(), &RI)) in copyPhysReg()
643 DefOp.setIsKill(false); in copyPhysReg()
647 .add(DefOp); in copyPhysReg()
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