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Searched refs:DefSubReg (Results 1 – 12 of 12) sorted by relevance

/external/llvm/lib/CodeGen/
DTargetRegisterInfo.cpp291 unsigned DefSubReg, in shareSameRegisterFile() argument
300 if (SrcSubReg && DefSubReg) { in shareSameRegisterFile()
301 return TRI.getCommonSuperRegClass(SrcRC, SrcSubReg, DefRC, DefSubReg, in shareSameRegisterFile()
308 std::swap(DefSubReg, SrcSubReg); in shareSameRegisterFile()
321 unsigned DefSubReg, in shouldRewriteCopySrc() argument
325 return shareSameRegisterFile(*this, DefRC, DefSubReg, SrcRC, SrcSubReg); in shouldRewriteCopySrc()
DPeepholeOptimizer.cpp298 unsigned DefSubReg; member in __anonbecaf5100111::ValueTracker
350 ValueTracker(unsigned Reg, unsigned DefSubReg, in ValueTracker() argument
354 : Def(nullptr), DefIdx(0), DefSubReg(DefSubReg), Reg(Reg), in ValueTracker()
369 ValueTracker(const MachineInstr &MI, unsigned DefIdx, unsigned DefSubReg, in ValueTracker() argument
373 : Def(&MI), DefIdx(DefIdx), DefSubReg(DefSubReg), in ValueTracker()
1672 if (Def->getOperand(DefIdx).getSubReg() != DefSubReg) in getNextSourceFromCopy()
1691 if (Def->getOperand(DefIdx).getSubReg() != DefSubReg) in getNextSourceFromBitcast()
1749 if (RegSeqInput.SubIdx == DefSubReg) { in getNextSourceFromRegSequence()
1791 if (InsertedReg.SubIdx == DefSubReg) { in getNextSourceFromInsertSubreg()
1809 (TRI->getSubRegIndexLaneMask(DefSubReg) & in getNextSourceFromInsertSubreg()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTargetRegisterInfo.cpp344 unsigned DefSubReg, in shareSameRegisterFile() argument
353 if (SrcSubReg && DefSubReg) { in shareSameRegisterFile()
354 return TRI.getCommonSuperRegClass(SrcRC, SrcSubReg, DefRC, DefSubReg, in shareSameRegisterFile()
361 std::swap(DefSubReg, SrcSubReg); in shareSameRegisterFile()
374 unsigned DefSubReg, in shouldRewriteCopySrc() argument
378 return shareSameRegisterFile(*this, DefRC, DefSubReg, SrcRC, SrcSubReg); in shouldRewriteCopySrc()
DPeepholeOptimizer.cpp373 unsigned DefSubReg; member in __anon2cc899b20111::ValueTracker
418 ValueTracker(unsigned Reg, unsigned DefSubReg, in ValueTracker() argument
421 : DefSubReg(DefSubReg), Reg(Reg), MRI(MRI), TII(TII) { in ValueTracker()
1818 if (Def->getOperand(DefIdx).getSubReg() != DefSubReg) in getNextSourceFromCopy()
1840 if (DefOp.getSubReg() != DefSubReg) in getNextSourceFromBitcast()
1913 if (RegSeqInput.SubIdx == DefSubReg) in getNextSourceFromRegSequence()
1950 if (InsertedReg.SubIdx == DefSubReg) { in getNextSourceFromInsertSubreg()
1968 !(TRI->getSubRegIndexLaneMask(DefSubReg) & in getNextSourceFromInsertSubreg()
1973 return ValueTrackerResult(BaseReg.Reg, DefSubReg); in getNextSourceFromInsertSubreg()
1984 if (DefSubReg) in getNextSourceFromExtractSubreg()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86RegisterInfo.h78 unsigned DefSubReg,
DX86RegisterInfo.cpp220 unsigned DefSubReg, in shouldRewriteCopySrc() argument
226 if (DefRC->hasSuperClassEq(&X86::GR64RegClass) && DefSubReg == 0 && in shouldRewriteCopySrc()
230 return TargetRegisterInfo::shouldRewriteCopySrc(DefRC, DefSubReg, in shouldRewriteCopySrc()
/external/llvm/lib/Target/AMDGPU/
DSIRegisterInfo.h136 unsigned DefSubReg,
DSIRegisterInfo.cpp809 unsigned DefSubReg, in shouldRewriteCopySrc() argument
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIRegisterInfo.h182 unsigned DefSubReg,
DSIRegisterInfo.cpp1468 unsigned DefSubReg, in shouldRewriteCopySrc() argument
/external/llvm/include/llvm/Target/
DTargetRegisterInfo.h518 unsigned DefSubReg,
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DTargetRegisterInfo.h535 unsigned DefSubReg,