| /external/llvm/lib/Target/X86/ |
| D | X86InstrAVX512.td | 581 AVX512AIi8Base, EVEX;
588 addr:$dst)]>, EVEX;
597 []>, EVEX_K, EVEX;
786 EVEX;
792 addr:$dst)]>, EVEX, EVEX_CD8<32, CD8VT1>;
805 Requires<[HasAVX512]>, T8PD, EVEX;
815 Requires<[HasAVX512]>, T8PD, EVEX, EVEX_K;
824 Requires<[HasAVX512]>, T8PD, EVEX, EVEX_KZ;
834 T8PD, EVEX;
839 T8PD, EVEX, EVEX_CD8<SrcInfo.EltSize, CD8VT1>;
[all …]
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| D | X86InstrFormats.td | 197 class EVEX : VEX { Encoding OpEnc = EncEVEX; }
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrAVX512.td | 788 AVX512AIi8Base, EVEX, Sched<[SchedRR]>;
796 addr:$dst)]>, EVEX,
806 EVEX_K, EVEX, Sched<[SchedMR]>, NotMemoryFoldable;
918 // smaller extract to enable EVEX->VEX.
947 // smaller extract to enable EVEX->VEX.
1087 EVEX, VEX_WIG, Sched<[WriteVecExtract]>;
1094 EVEX, VEX_WIG, EVEX_CD8<32, CD8VT1>, Sched<[WriteVecExtractSt]>;
1138 DestInfo.ExeDomain>, T8PD, EVEX, Sched<[SchedRR]>;
1150 DestInfo.ExeDomain>, T8PD, EVEX, EVEX_KZ, Sched<[SchedRR]>;
1164 DestInfo.ExeDomain>, T8PD, EVEX, EVEX_K, Sched<[SchedRR]>;
[all …]
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| D | X86EvexToVex.cpp | 222 if ((Desc.TSFlags & X86II::EncodingMask) != X86II::EVEX) in CompressEvexToVexImpl()
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| D | X86InstrFMA3Info.cpp | 137 (TSFlags & X86II::EncodingMask) == X86II::EVEX) && in getFMA3Group()
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| D | X86InstrFormats.td | 220 class EVEX { Encoding OpEnc = EncEVEX; }
221 class EVEX_4V : EVEX { bit hasVEX_4V = 1; }
256 // Prevent EVEX->VEX conversion from considering this instruction.
303 bit EVEX_W1_VEX_W0 = 0; // This EVEX inst with VEX.W==1 can become a VEX
342 bit notEVEX2VEXConvertible = 0; // Prevent EVEX->VEX conversion.
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| D | X86ISelDAGToDAG.cpp | 1361 (TSFlags & X86II::EncodingMask) != X86II::EVEX && in PostprocessISelDAG()
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| D | X86InstrInfo.cpp | 2018 if ((Desc.TSFlags & X86II::EncodingMask) == X86II::EVEX) in findCommutedOpIndices()
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenEVEX2VEXTables.inc | 9 // X86 EVEX encoded instructions that have a VEX 128 encoding
10 // (table format: <EVEX opcode, VEX-128 opcode>).
12 // EVEX scalar with corresponding VEX.
750 // X86 EVEX encoded instructions that have a VEX 256 encoding
751 // (table format: <EVEX opcode, VEX-256 opcode>).
753 // EVEX scalar with corresponding VEX.
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCCodeEmitter.cpp | 166 assert(((TSFlags & X86II::EncodingMask) == X86II::EVEX) && in isCDisp8()
359 bool HasEVEX = (TSFlags & X86II::EncodingMask) == X86II::EVEX; in emitMemModRMByte()
920 assert(Encoding == X86II::EVEX && "unknown encoding!"); in EmitVEXOpcodePrefix()
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| D | X86BaseInfo.h | 475 EVEX = 3 << EncodingShift, enumerator
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCCodeEmitter.cpp | 142 assert(((TSFlags & X86II::EncodingMask) == X86II::EVEX) && in isCDisp8()
379 bool HasEVEX = (TSFlags & X86II::EncodingMask) == X86II::EVEX; in emitMemModRMByte()
1140 assert(Encoding == X86II::EVEX && "unknown encoding!"); in emitVEXOpcodePrefix()
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| D | X86BaseInfo.h | 851 EVEX = 3 << EncodingShift, enumerator
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| D | X86MCTargetDesc.cpp | 422 bool HasEVEX = (Desc.TSFlags & X86II::EncodingMask) == X86II::EVEX; in clearsSuperRegisters()
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| /external/llvm/utils/TableGen/ |
| D | X86RecognizableInstr.cpp | 127 VEX = 1, XOP = 2, EVEX = 3 enumerator
288 if (Encoding == X86Local::EVEX) { in insnContext()
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| /external/llvm/test/MC/Disassembler/X86/ |
| D | x86-64.txt | 424 # Try all combinations of EVEX.x and REX.b:
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| /external/libvpx/third_party/x86inc/ |
| D | x86inc.asm | 1475 ; Instructions with both VEX/EVEX and legacy encodings
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| /external/libaom/third_party/x86inc/ |
| D | x86inc.asm | 1475 ; Instructions with both VEX/EVEX and legacy encodings
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| /external/capstone/ |
| D | ChangeLog | 108 - Fix some issues in handling EVEX & VEX3 instructions.
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 3170 (MCID.TSFlags & X86II::EncodingMask) != X86II::EVEX) in checkTargetMatchPredicate()
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