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Searched refs:FP_TO_UINT (Results 1 – 25 of 68) sorted by relevance

123

/external/llvm/lib/Target/ARM/
DARMTargetTransformInfo.cpp154 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
156 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 3 }, in getCastInstrCost()
158 { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
172 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost()
174 { ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f32, 4 }, in getCastInstrCost()
176 { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, 8 } in getCastInstrCost()
189 { ISD::FP_TO_UINT, MVT::i1, MVT::f32, 2 }, in getCastInstrCost()
191 { ISD::FP_TO_UINT, MVT::i1, MVT::f64, 2 }, in getCastInstrCost()
193 { ISD::FP_TO_UINT, MVT::i8, MVT::f32, 2 }, in getCastInstrCost()
195 { ISD::FP_TO_UINT, MVT::i8, MVT::f64, 2 }, in getCastInstrCost()
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64TargetTransformInfo.cpp259 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f32, 1 }, in getCastInstrCost()
260 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
261 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f64, 1 }, in getCastInstrCost()
267 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f32, 2 }, in getCastInstrCost()
268 { ISD::FP_TO_UINT, MVT::v2i16, MVT::v2f32, 1 }, in getCastInstrCost()
269 { ISD::FP_TO_UINT, MVT::v2i8, MVT::v2f32, 1 }, in getCastInstrCost()
274 { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
275 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 2 }, in getCastInstrCost()
281 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost()
282 { ISD::FP_TO_UINT, MVT::v2i16, MVT::v2f64, 2 }, in getCastInstrCost()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMTargetTransformInfo.cpp268 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
270 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 3 }, in getCastInstrCost()
272 { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
286 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost()
288 { ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f32, 4 }, in getCastInstrCost()
290 { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, 8 } in getCastInstrCost()
303 { ISD::FP_TO_UINT, MVT::i1, MVT::f32, 2 }, in getCastInstrCost()
305 { ISD::FP_TO_UINT, MVT::i1, MVT::f64, 2 }, in getCastInstrCost()
307 { ISD::FP_TO_UINT, MVT::i8, MVT::f32, 2 }, in getCastInstrCost()
309 { ISD::FP_TO_UINT, MVT::i8, MVT::f64, 2 }, in getCastInstrCost()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64TargetTransformInfo.cpp370 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f32, 1 }, in getCastInstrCost()
371 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
372 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f64, 1 }, in getCastInstrCost()
378 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f32, 2 }, in getCastInstrCost()
379 { ISD::FP_TO_UINT, MVT::v2i16, MVT::v2f32, 1 }, in getCastInstrCost()
380 { ISD::FP_TO_UINT, MVT::v2i8, MVT::v2f32, 1 }, in getCastInstrCost()
385 { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
386 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 2 }, in getCastInstrCost()
392 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost()
393 { ISD::FP_TO_UINT, MVT::v2i16, MVT::v2f64, 2 }, in getCastInstrCost()
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/external/llvm/test/CodeGen/X86/
Davx-fp2int.ll3 ;; Check that FP_TO_SINT and FP_TO_UINT generate convert with truncate
Dhalf.ll123 ; FP_TO_UINT is expanded using FP_TO_SINT
/external/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp542 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f32, 1 }, in getCastInstrCost()
543 { ISD::FP_TO_UINT, MVT::v4i64, MVT::v4f32, 1 }, in getCastInstrCost()
544 { ISD::FP_TO_UINT, MVT::v8i64, MVT::v8f32, 1 }, in getCastInstrCost()
545 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f64, 1 }, in getCastInstrCost()
546 { ISD::FP_TO_UINT, MVT::v4i64, MVT::v4f64, 1 }, in getCastInstrCost()
547 { ISD::FP_TO_UINT, MVT::v8i64, MVT::v8f64, 1 }, in getCastInstrCost()
610 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f32, 1 }, in getCastInstrCost()
611 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
612 { ISD::FP_TO_UINT, MVT::v8i32, MVT::v8f32, 1 }, in getCastInstrCost()
613 { ISD::FP_TO_UINT, MVT::v16i32, MVT::v16f32, 1 }, in getCastInstrCost()
[all …]
DX86IntrinsicsInfo.h599 ISD::FP_TO_UINT, 0),
601 ISD::FP_TO_UINT, 0),
603 ISD::FP_TO_UINT, ISD::FP_TO_UINT),
605 ISD::FP_TO_UINT, 0),
607 ISD::FP_TO_UINT, 0),
609 ISD::FP_TO_UINT, ISD::FP_TO_UINT),
623 ISD::FP_TO_UINT, 0),
625 ISD::FP_TO_UINT, 0),
627 ISD::FP_TO_UINT, ISD::FP_TO_UINT),
629 ISD::FP_TO_UINT, 0),
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp1324 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f32, 1 }, in getCastInstrCost()
1325 { ISD::FP_TO_UINT, MVT::v4i64, MVT::v4f32, 1 }, in getCastInstrCost()
1326 { ISD::FP_TO_UINT, MVT::v8i64, MVT::v8f32, 1 }, in getCastInstrCost()
1327 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f64, 1 }, in getCastInstrCost()
1328 { ISD::FP_TO_UINT, MVT::v4i64, MVT::v4f64, 1 }, in getCastInstrCost()
1329 { ISD::FP_TO_UINT, MVT::v8i64, MVT::v8f64, 1 }, in getCastInstrCost()
1395 { ISD::FP_TO_UINT, MVT::i64, MVT::f32, 1 }, in getCastInstrCost()
1396 { ISD::FP_TO_UINT, MVT::i64, MVT::f64, 1 }, in getCastInstrCost()
1398 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f32, 1 }, in getCastInstrCost()
1399 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DConstrainedOps.def47 INSTRUCTION(FPToUI, 1, 0, experimental_constrained_fptoui, FP_TO_UINT)
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h449 FP_TO_UINT, enumerator
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp300 case ISD::FP_TO_UINT: in LegalizeOp()
391 case ISD::FP_TO_UINT: in Promote()
482 if (!isSigned && TLI.isOperationLegalOrCustom(ISD::FP_TO_UINT, NewVT)) { in PromoteFP_TO_INT()
483 NewOpc = ISD::FP_TO_UINT; in PromoteFP_TO_INT()
DSelectionDAGDumper.cpp257 case ISD::FP_TO_UINT: return "fp_to_uint"; in getOperationName()
DLegalizeVectorTypes.cpp90 case ISD::FP_TO_UINT: in ScalarizeVectorResult()
441 case ISD::FP_TO_UINT: in ScalarizeVectorOperand()
649 case ISD::FP_TO_UINT: in SplitVectorResult()
1485 case ISD::FP_TO_UINT: in SplitVectorOperand()
2139 case ISD::FP_TO_UINT: in WidenVectorResult()
3098 case ISD::FP_TO_UINT: in WidenVectorOperand()
DLegalizeIntegerTypes.cpp115 case ISD::FP_TO_UINT: Res = PromoteIntRes_FP_TO_XINT(N); break; in PromoteIntegerResult()
425 if (N->getOpcode() == ISD::FP_TO_UINT && in PromoteIntRes_FP_TO_XINT()
426 !TLI.isOperationLegal(ISD::FP_TO_UINT, NVT) && in PromoteIntRes_FP_TO_XINT()
435 return DAG.getNode(N->getOpcode() == ISD::FP_TO_UINT ? in PromoteIntRes_FP_TO_XINT()
1323 case ISD::FP_TO_UINT: ExpandIntRes_FP_TO_UINT(N, Lo, Hi); break; in ExpandIntegerResult()
DLegalizeFloatTypes.cpp760 case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_XINT(N); break; in SoftenFloatOperand()
1510 case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break; in ExpandFloatOperand()
1748 case ISD::FP_TO_UINT: R = PromoteFloatOp_FP_TO_XINT(N, OpNo); break; in PromoteFloatOperand()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h586 FP_TO_UINT, enumerator
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp409 case ISD::FP_TO_UINT: in LegalizeOp()
566 case ISD::FP_TO_UINT: in Promote()
671 if (NewOpc == ISD::FP_TO_UINT && in PromoteFP_TO_INT()
691 if (Node->getOpcode() == ISD::FP_TO_UINT || in PromoteFP_TO_INT()
869 case ISD::FP_TO_UINT: in Expand()
DSelectionDAGDumper.cpp339 case ISD::FP_TO_UINT: return "fp_to_uint"; in getOperationName()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp331 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in AMDGPUTargetLowering()
368 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in AMDGPUTargetLowering()
722 case ISD::FP_TO_UINT: return LowerFP_TO_UINT(Op, DAG); in LowerOperation()
1255 ISD::NodeType ToInt = Sign ? ISD::FP_TO_SINT : ISD::FP_TO_UINT; in LowerDIVREM24()
2061 SDValue Hi = DAG.getNode(Signed ? ISD::FP_TO_SINT : ISD::FP_TO_UINT, SL, in LowerFP64_TO_INT()
2063 SDValue Lo = DAG.getNode(ISD::FP_TO_UINT, SL, MVT::i32, Fma); in LowerFP64_TO_INT()
DR600ISelLowering.cpp124 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Custom); in R600TargetLowering()
126 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in R600TargetLowering()
835 case ISD::FP_TO_UINT: in ReplaceNodeResults()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp343 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in AMDGPUTargetLowering()
365 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in AMDGPUTargetLowering()
1152 case ISD::FP_TO_UINT: return LowerFP_TO_UINT(Op, DAG); in LowerOperation()
1550 ISD::NodeType ToInt = Sign ? ISD::FP_TO_SINT : ISD::FP_TO_UINT; in LowerDIVREM24()
1694 SDValue Rcp_Lo = DAG.getNode(ISD::FP_TO_UINT, DL, HalfVT, Mad2); in LowerUDIVREM64()
1695 SDValue Rcp_Hi = DAG.getNode(ISD::FP_TO_UINT, DL, HalfVT, Trunc); in LowerUDIVREM64()
2601 SDValue Hi = DAG.getNode(Signed ? ISD::FP_TO_SINT : ISD::FP_TO_UINT, SL, in LowerFP64_TO_INT()
2603 SDValue Lo = DAG.getNode(ISD::FP_TO_UINT, SL, MVT::i32, Fma); in LowerFP64_TO_INT()
DR600ISelLowering.cpp166 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Custom); in R600TargetLowering()
169 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in R600TargetLowering()
659 case ISD::FP_TO_UINT: in ReplaceNodeResults()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp234 setOperationAction(ISD::FP_TO_UINT, MVT::ppcf128, Custom); in PPCTargetLowering()
514 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); in PPCTargetLowering()
519 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in PPCTargetLowering()
526 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Legal); in PPCTargetLowering()
528 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in PPCTargetLowering()
535 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in PPCTargetLowering()
541 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in PPCTargetLowering()
710 setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal); in PPCTargetLowering()
866 setOperationAction(ISD::FP_TO_UINT, MVT::v2i64, Legal); in PPCTargetLowering()
997 setOperationAction(ISD::FP_TO_UINT , MVT::v4f64, Expand); in PPCTargetLowering()
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp371 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); in PPCTargetLowering()
376 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in PPCTargetLowering()
382 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in PPCTargetLowering()
389 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in PPCTargetLowering()
395 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in PPCTargetLowering()
516 setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal); in PPCTargetLowering()
647 setOperationAction(ISD::FP_TO_UINT, MVT::v2i64, Legal); in PPCTargetLowering()
702 setOperationAction(ISD::FP_TO_UINT , MVT::v4f64, Expand); in PPCTargetLowering()
752 setOperationAction(ISD::FP_TO_UINT , MVT::v4f32, Expand); in PPCTargetLowering()
6499 (Op.getOpcode() == ISD::FP_TO_UINT || in canReuseLoadAddress()
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