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Searched refs:Fused (Results 1 – 25 of 63) sorted by relevance

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/external/armnn/docs/
D05_03_delegate.dox44 - AVERAGE_POOL_2D, Supported Fused Activation: RELU, RELU6, RELU_N1_TO_1, SIGMOID, TANH, NONE
46 - AVERAGE_POOL_3D, Supported Fused Activation: RELU, RELU6, RELU_N1_TO_1, SIGMOID, SIGN_BIT, TANH, …
54 - CONCATENATION, Supported Fused Activation: RELU, RELU6, RELU_N1_TO_1, SIGMOID, TANH, NONE
56 - CONV_2D, Supported Fused Activation: RELU, RELU6, RELU_N1_TO_1, SIGMOID, TANH, NONE
58 - CONV_3D, Supported Fused Activation: RELU, RELU6, RELU_N1_TO_1, SIGMOID, TANH, NONE
62 - DEPTHWISE_CONV_2D, Supported Fused Activation: RELU, RELU6, RELU_N1_TO_1, SIGMOID, TANH, NONE
82 - FULLY_CONNECTED, Supported Fused Activation: RELU, RELU6, RELU_N1_TO_1, SIGMOID, TANH, NONE
120 - MAX_POOL_2D, Supported Fused Activation: RELU, RELU6, RELU_N1_TO_1, SIGMOID, TANH, NONE
122 - MAX_POOL_3D, Supported Fused Activation: RELU, RELU6, RELU_N1_TO_1, SIGMOID, SIGN_BIT, TANH, NONE
D05_01_parsers.dox124 - AVERAGE_POOL_2D, Supported Fused Activation: RELU , RELU6 , TANH, NONE
126 - CONCATENATION, Supported Fused Activation: RELU , RELU6 , TANH, NONE
127 - CONV_2D, Supported Fused Activation: RELU , RELU6 , TANH, NONE
128 - CONV_3D, Supported Fused Activation: RELU , RELU6 , TANH, NONE
130 - DEPTHWISE_CONV_2D, Supported Fused Activation: RELU , RELU6 , TANH, NONE
138 - FULLY_CONNECTED, Supported Fused Activation: RELU , RELU6 , TANH, NONE
152 - MAX_POOL_2D, Supported Fused Activation: RELU , RELU6 , TANH, NONE
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DMCFragment.h528 bool Fused : 1; variable
536 MCBoundaryAlignFragment(Align AlignBoundary, bool Fused = false,
539 Fused(Fused), EmitNops(EmitNops) {} in MCFragment()
546 bool isFused() const { return Fused; } in isFused()
547 void setFused(bool Value) { Fused = Value; } in setFused()
/external/tensorflow/tensorflow/lite/delegates/xnnpack/
DREADME.md227 * Fused `NONE`, `RELU`, `RELU_N1_TO_1`, and `RELU6` activations are supported,
234 * Fused `NONE`, `RELU`, `RELU_N1_TO_1`, and `RELU6` activations are supported,
251 * Fused `NONE`, `RELU`, `RELU_N1_TO_1`, and `RELU6` activations are supported,
264 * Fused `NONE`, `RELU`, `RELU_N1_TO_1`, and `RELU6` activations are supported,
270 * Fused `NONE`, `RELU`, `RELU_N1_TO_1`, and `RELU6` activations are supported,
281 * Fused `NONE`, `RELU`, `RELU_N1_TO_1`, and `RELU6` activations are supported,
304 * Fused `NONE`, `RELU`, `RELU_N1_TO_1`, and `RELU6` activations are supported,
327 * Fused `NONE`, `RELU`, `RELU_N1_TO_1`, and `RELU6` activations are supported,
403 * Fused `NONE`, `RELU`, `RELU_N1_TO_1`, and `RELU6` activations are supported,
656 * Fused `NONE`, `RELU`, `RELU_N1_TO_1`, and `RELU6` activations are supported,
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZInstrHFP.td191 // Fused multiply-add.
197 // Fused multiply-subtract.
211 // Fused multiply-add (unnormalized).
DSystemZInstrFP.td501 // Fused multiply-add.
510 // Fused multiply-subtract.
DSystemZOperators.td710 // Fused multiply-subtract, using the natural operand order.
714 // Fused multiply-add and multiply-subtract, but with the order of the
/external/llvm/lib/Target/X86/
DX86InstrFMA.td10 // This file describes FMA (Fused Multiply-Add) instructions.
15 // FMA3 - Intel 3 operand Fused Multiply-Add instructions
91 // Fused Multiply-Add
118 // Fused Negative Multiply-Add
263 // FMA4 - AMD 4 operand Fused Multiply-Add instructions
/external/virglrenderer/docs/
DGL-status.txt22 - Fused multiply-add
/external/llvm/lib/Target/ARM/
DARMScheduleV6.td246 // Single-precision Fused FP MAC
249 // Double-precision Fused FP MAC
DARMScheduleA8.td330 // Single-precision Fused FP MAC
334 // Double-precision Fused FP MAC
878 // Double-register Fused FP Multiple-Accumulate
882 // Quad-register Fused FP Multiple-Accumulate
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMScheduleV6.td245 // Single-precision Fused FP MAC
248 // Double-precision Fused FP MAC
DARMScheduleA8.td329 // Single-precision Fused FP MAC
333 // Double-precision Fused FP MAC
877 // Double-register Fused FP Multiple-Accumulate
881 // Quad-register Fused FP Multiple-Accumulate
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrFMA.td9 // This file describes FMA (Fused Multiply-Add) instructions.
14 // FMA3 - Intel 3 operand Fused Multiply-Add instructions
123 // Fused Multiply-Add
154 // Fused Negative Multiply-Add
386 // FMA4 - AMD 4 operand Fused Multiply-Add instructions
DX86Schedule.td287 defm WriteFMA : X86SchedWritePair<ReadAfterVecLd>; // Fused Multiply Add.
288 defm WriteFMAX : X86SchedWritePair<ReadAfterVecXLd>; // Fused Multiply Add (XMM).
289 defm WriteFMAY : X86SchedWritePair<ReadAfterVecYLd>; // Fused Multiply Add (YMM).
290 defm WriteFMAZ : X86SchedWritePair<ReadAfterVecYLd>; // Fused Multiply Add (ZMM).
DX86SchedBroadwell.td305 defm : BWWriteResPair<WriteFMA, [BWPort01], 5, [1], 1, 5>; // Fused Multiply Add.
306 defm : BWWriteResPair<WriteFMAX, [BWPort01], 5, [1], 1, 5>; // Fused Multiply Add (XMM).
307 defm : BWWriteResPair<WriteFMAY, [BWPort01], 5, [1], 1, 6>; // Fused Multiply Add (YMM/ZMM).
/external/rust/crates/serde_json/src/
Dread.rs781 pub trait Fused: private::Sealed {} interface
782 impl<'a> Fused for SliceRead<'a> {}
783 impl<'a> Fused for StrRead<'a> {}
/external/ComputeLibrary/docs/user_guide/
Derrata.dox76 - Fused bounded relu activation with coefficient 'a' being negative
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/
DLoopFuse.cpp692 bool Fused = false; in fuseCandidates() local
825 Fused = true; in fuseCandidates()
829 return Fused; in fuseCandidates()
/external/tensorflow/tensorflow/lite/examples/experimental_new_converter/
DKeras_LSTM_fusion_Codelab.ipynb206 …"![Fused LSTM](https://raw.githubusercontent.com/tensorflow/tensorflow/master/tensorflow/lite/exam…
/external/tensorflow/tensorflow/lite/g3doc/examples/convert/
Doperation_fusion.md33 Fused operations exist to maximize the performance of their underlying kernel
38 Fused operations also provide a higher level interface to define complex
Drnn.md6 fused LSTM operations. Fused operations exist to maximize the performance of
/external/llvm/lib/Target/SystemZ/
DSystemZInstrFP.td415 // Fused multiply-add.
422 // Fused multiply-subtract.
DSystemZOperators.td562 // Fused multiply-subtract, using the natural operand order.
566 // Fused multiply-add and multiply-subtract, but with the order of the
/external/llvm/docs/
DCompileCudaWithLLVM.rst173 Fused multiply-add instructions can be much faster than the unfused

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