Home
last modified time | relevance | path

Searched refs:GEN8_PTE_SIZE (Results 1 – 3 of 3) sorted by relevance

/external/mesa3d/src/intel/tools/
Dgen_context.h73 #define GEN8_PTE_SIZE 8 macro
76 #define PT_SIZE ALIGN(NUM_PT_ENTRIES * GEN8_PTE_SIZE, 4096)
Daub_write.c173 GEN8_PTE_SIZE, in aub_file_init()
193 return NUM_PT_ENTRIES * (aub->addr_bits > 32 ? GEN8_PTE_SIZE : PTE_SIZE); in aub_gtt_size()
408 (virt_addr >> 12) * GEN8_PTE_SIZE, in aub_map_ggtt()
409 ggtt_ptes * GEN8_PTE_SIZE, in aub_map_ggtt()
/external/igt-gpu-tools/tools/
Daubdump.c86 #define GEN8_PTE_SIZE 8 macro
89 #define PT_SIZE ALIGN(NUM_PT_ENTRIES * GEN8_PTE_SIZE, 4096)
355 return NUM_PT_ENTRIES * (addr_bits > 32 ? GEN8_PTE_SIZE : PTE_SIZE); in gtt_size()
403 entry_addr >> 9, num_entries * GEN8_PTE_SIZE, in gen8_emit_ggtt_pte_for_range()