1 /****************************************************************************** 2 * 3 * Copyright (C) 2015 The Android Open Source Project 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ***************************************************************************** 18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore 19 */ 20 /** 21 ******************************************************************************* 22 * @file 23 * ih264e_defs.h 24 * 25 * @brief 26 * Definitions used in the encoder 27 * 28 * @author 29 * ittiam 30 * 31 * @remarks 32 * None 33 * 34 ******************************************************************************* 35 */ 36 37 #ifndef IH264E_DEFS_H_ 38 #define IH264E_DEFS_H_ 39 40 41 #define PARSE_COEFF_DATA_BLOCK_4x4(pv_mb_coeff_data, ps_mb_coeff_data, u4_nnz, u4_sig_coeff_map, pi2_res_block) \ 42 { \ 43 ps_mb_coeff_data = pv_mb_coeff_data; \ 44 u4_nnz = ps_mb_coeff_data->i4_sig_map_nnz & 0xff; \ 45 if (u4_nnz) \ 46 { \ 47 u4_sig_coeff_map = ps_mb_coeff_data->i4_sig_map_nnz >> 16; \ 48 pi2_res_block = ps_mb_coeff_data->ai2_residue; \ 49 pv_mb_coeff_data = ps_mb_coeff_data->ai2_residue + ALIGN2(u4_nnz); \ 50 } \ 51 else \ 52 { \ 53 pv_mb_coeff_data = ps_mb_coeff_data->ai2_residue; \ 54 } \ 55 } 56 57 /*****************************************************************************/ 58 /* Width and height restrictions */ 59 /*****************************************************************************/ 60 /** 61 * Minimum width supported by codec 62 */ 63 #define MIN_WD 16 64 65 /** 66 * Maximum width supported by codec 67 */ 68 69 /* changed by haining@ to support Nexus 6P screen size, was previously 1920 */ 70 #define MAX_WD 2560 71 72 /** 73 * Minimum height supported by codec 74 */ 75 #define MIN_HT 16 76 77 /** 78 * Maximum height supported by codec 79 */ 80 81 /* changed by haining@ to support Nexus 6P screen size, was previously 1920 */ 82 #define MAX_HT 2560 83 84 /*****************************************************************************/ 85 /* Padding sizes */ 86 /*****************************************************************************/ 87 /** 88 * Padding used for top of the frame 89 */ 90 #define PAD_TOP 32 91 92 /** 93 * Padding used for bottom of the frame 94 */ 95 #define PAD_BOT 32 96 97 /** 98 * Padding used at left of the frame 99 */ 100 #define PAD_LEFT 32 101 102 /** 103 * Padding used at right of the frame 104 */ 105 #define PAD_RIGHT 32 106 /** 107 * Padding for width 108 */ 109 #define PAD_WD (PAD_LEFT + PAD_RIGHT) 110 /** 111 * Padding for height 112 */ 113 #define PAD_HT (PAD_TOP + PAD_BOT) 114 115 /* 116 * buffer width and height for half pel buffers 117 */ 118 #define HP_BUFF_WD 24 119 #define HP_BUFF_HT 18 120 121 /*****************************************************************************/ 122 /* Number of frame restrictions */ 123 /*****************************************************************************/ 124 /** 125 * Maximum number of reference pictures 126 */ 127 #define MAX_REF_PIC_CNT 2 128 129 /** 130 * Minimum number of reference pictures 131 */ 132 #define MIN_REF_PIC_CNT 1 133 134 /** 135 * Maximum number of B pictures between two I/P pictures 136 */ 137 #define MAX_NUM_BFRAMES 8 138 139 /** 140 * Maximum number of pictures in input queue 141 */ 142 #define MAX_NUM_INP_FRAMES ((MAX_NUM_BFRAMES) + 2) 143 144 /** 145 * Maximum number of reference buffers in DPB manager 146 */ 147 #define MAX_REF_CNT 32 148 149 /*****************************************************************************/ 150 /* Minimum size of inter prediction unit supported by encoder */ 151 /*****************************************************************************/ 152 #define ENC_MIN_PU_SIZE 16 153 154 /*****************************************************************************/ 155 /* Num cores releated defs */ 156 /*****************************************************************************/ 157 /** 158 * Maximum number of cores 159 */ 160 #define MAX_NUM_CORES 8 161 162 /** 163 * Maximum number of threads for pixel processing 164 */ 165 #define MAX_PROCESS_THREADS MAX_NUM_CORES 166 167 /** 168 * Maximum process context sets 169 * Used to stagger encoding of MAX_CTXT_SETS in parallel 170 */ 171 #define MAX_CTXT_SETS 1 172 /** 173 * Maximum number of contexts 174 * Kept as twice the number of threads, to make it easier to initialize the contexts 175 * from master thread 176 */ 177 #define MAX_PROCESS_CTXT MAX_NUM_CORES * MAX_CTXT_SETS 178 179 /*****************************************************************************/ 180 /* Profile and level restrictions */ 181 /*****************************************************************************/ 182 /** 183 * Max level supported by the codec 184 */ 185 #define MAX_LEVEL IH264_LEVEL_51 186 187 /** 188 * Min level supported by the codec 189 */ 190 #define MIN_LEVEL IH264_LEVEL_10 191 192 /** 193 * Maximum number of slice headers that are held in memory simultaneously 194 * For single core implementation only 1 slice header is enough. 195 * But for multi-core parsing thread needs to ensure that slice headers are 196 * stored till the last CB in a slice is decoded. 197 * Parsing thread has to wait till last CB of a slice is consumed before reusing 198 * overwriting the slice header 199 * MAX_SLICE_HDR_CNT is assumed to be a power of 2 200 */ 201 202 #define LOG2_MAX_SLICE_HDR_CNT 8 203 #define MAX_SLICE_HDR_CNT (1 << LOG2_MAX_SLICE_HDR_CNT) 204 205 /* Generic declarations */ 206 #define DEFAULT_MAX_LEVEL 40 207 #define DEFAULT_RECON_ENABLE 0 208 #define DEFAULT_QUALITY_METRICS_ENABLE 0 209 #define DEFAULT_RC IVE_RC_STORAGE 210 #define DEFAULT_MAX_FRAMERATE 120000 211 #define DEFAULT_MAX_BITRATE 240000000 212 #define DEFAULT_MAX_NUM_BFRAMES 0 213 #define DEFAULT_MAX_SRCH_RANGE_X 256 214 #define DEFAULT_MAX_SRCH_RANGE_Y 256 215 #define DEFAULT_SLICE_PARAM 256 216 #define DEFAULT_SRC_FRAME_RATE 30000 217 #define DEFAULT_TGT_FRAME_RATE 30000 218 #define DEFAULT_BITRATE 6000000 219 #define DEFAULT_QP_MIN 10 220 #define DEFAULT_QP_MAX 51 221 #define DEFAULT_I_QP 25 222 #define DEFAULT_P_QP 28 223 #define DEFAULT_B_QP 28 224 #define DEFAULT_AIR_MODE IVE_AIR_MODE_NONE 225 #define DEFAULT_AIR_REFRESH_PERIOD 30 226 #define DEFAULT_VBV_DELAY 1000 227 #define DEFAULT_VBV_SIZE 240000000 /* level 6.0 */ 228 #define DEFAULT_NUM_CORES 1 229 #define DEFAULT_ME_SPEED_PRESET 100 230 #define DEFAULT_HPEL 1 231 #define DEFAULT_QPEL 1 232 #define DEFAULT_I4 1 233 #define DEFAULT_I8 0 234 #define DEFAULT_I16 1 235 #define DEFAULT_ENABLE_FAST_SAD 0 236 #define DEFAULT_ENABLE_SATQD 1 237 #define DEFAULT_MIN_SAD_ENABLE 0 238 #define DEFAULT_MIN_SAD_DISABLE -1 239 #define DEFAULT_SRCH_RNG_X 64 240 #define DEFAULT_SRCH_RNG_Y 48 241 #define DEFAULT_I_INTERVAL 30 242 #define DEFAULT_IDR_INTERVAL 1000 243 #define DEFAULT_B_FRAMES 0 244 #define DEFAULT_DISABLE_DEBLK_LEVEL 0 245 #define DEFAULT_PROFILE IV_PROFILE_BASE 246 #define DEFAULT_MIN_INTRA_FRAME_RATE 1 247 #define DEFAULT_MAX_INTRA_FRAME_RATE 2147483647 248 #define DEFAULT_MIN_BUFFER_DELAY 30 249 #define DEFAULT_MAX_BUFFER_DELAY 20000 250 #define DEFAULT_STRIDE 0 251 #define DEFAULT_ENC_SPEED_PRESET IVE_USER_DEFINED 252 #define DEFAULT_PRE_ENC_ME 0 253 #define DEFAULT_PRE_ENC_IPE 0 254 #define DEFAULT_ENTROPY_CODING_MODE 0 255 256 /** Maximum number of entries in input buffer list */ 257 #define MAX_INP_BUF_LIST_ENTRIES 32 258 259 /** Maximum number of entries in output buffer list */ 260 #define MAX_OUT_BUF_LIST_ENTRIES 32 261 262 /** Maximum number of entries in recon buffer list used within the encoder */ 263 #define MAX_REC_LIST_ENTRIES 16 264 265 /** Number of buffers created to hold half-pel planes for every reference buffer */ 266 #define HPEL_PLANES_CNT 1 267 268 /** Number of buffers Needed for SUBPEL and BIPRED computation */ 269 #define SUBPEL_BUFF_CNT 4 270 271 /** Mask value for PSNR. Needed when quality metrics is enabled */ 272 #define QUALITY_MASK_PSNR 0x1 273 /** 274 ***************************************************************************** 275 * Macro to compute total size required to hold on set of scaling matrices 276 ***************************************************************************** 277 */ 278 #define SCALING_MAT_SIZE(m_scaling_mat_size) \ 279 { \ 280 m_scaling_mat_size = 6 * TRANS_SIZE_4 * TRANS_SIZE_4; \ 281 m_scaling_mat_size += 6 * TRANS_SIZE_8 * TRANS_SIZE_8; \ 282 m_scaling_mat_size += 6 * TRANS_SIZE_16 * TRANS_SIZE_16; \ 283 m_scaling_mat_size += 2 * TRANS_SIZE_32 * TRANS_SIZE_32; \ 284 } 285 286 /** 287 ****************************************************************************** 288 * @brief Macros to get raster scan position of a block[8x8] / sub block[4x4] 289 ****************************************************************************** 290 */ 291 #define GET_BLK_RASTER_POS_X(x) ((x & 0x01)) 292 #define GET_BLK_RASTER_POS_Y(y) ((y >> 1)) 293 #define GET_SUB_BLK_RASTER_POS_X(x) ((x & 0x01)) 294 #define GET_SUB_BLK_RASTER_POS_Y(y) ((y >> 1)) 295 296 #define NUM_RC_MEMTABS 17 297 298 /** 299 *************************************************************************** 300 * Enum to hold various mem records being request 301 **************************************************************************** 302 */ 303 enum 304 { 305 /** 306 * Codec Object at API level 307 */ 308 MEM_REC_IV_OBJ, 309 310 /** 311 * Codec context 312 */ 313 MEM_REC_CODEC, 314 315 /** 316 * Cabac context 317 */ 318 MEM_REC_CABAC, 319 320 /** 321 * Cabac context_mb_info 322 */ 323 MEM_REC_CABAC_MB_INFO, 324 325 /** 326 * entropy context 327 */ 328 MEM_REC_ENTROPY, 329 330 /** 331 * Buffer to hold coeff data 332 */ 333 MEM_REC_MB_COEFF_DATA, 334 335 /** 336 * Buffer to hold coeff data 337 */ 338 MEM_REC_MB_HEADER_DATA, 339 340 /** 341 * Motion vector bank 342 */ 343 MEM_REC_MVBANK, 344 345 /** 346 * Motion vector bits 347 */ 348 MEM_REC_MVBITS, 349 350 /** 351 * Holds mem records passed to the codec. 352 */ 353 MEM_REC_BACKUP, 354 355 /** 356 * Holds SPS 357 */ 358 MEM_REC_SPS, 359 360 /** 361 * Holds PPS 362 */ 363 MEM_REC_PPS, 364 365 /** 366 * Holds Slice Headers 367 */ 368 MEM_REC_SLICE_HDR, 369 370 /** 371 * Contains map indicating slice index per MB basis 372 */ 373 MEM_REC_SLICE_MAP, 374 375 /** 376 * Holds thread handles 377 */ 378 MEM_REC_THREAD_HANDLE, 379 380 /** 381 * Holds control call mutex 382 */ 383 MEM_REC_CTL_MUTEX, 384 385 /** 386 * Holds entropy call mutex 387 */ 388 MEM_REC_ENTROPY_MUTEX, 389 390 /** 391 * Holds memory for Process JOB Queue 392 */ 393 MEM_REC_PROC_JOBQ, 394 395 /** 396 * Holds memory for Entropy JOB Queue 397 */ 398 MEM_REC_ENTROPY_JOBQ, 399 400 /** 401 * Contains status map indicating processing status per MB basis 402 */ 403 MEM_REC_PROC_MAP, 404 405 /** 406 * Contains status map indicating deblocking status per MB basis 407 */ 408 MEM_REC_DBLK_MAP, 409 410 /* 411 * Contains AIR map and mask 412 */ 413 MEM_REC_AIR_MAP, 414 415 /** 416 * Contains status map indicating ME status per MB basis 417 */ 418 MEM_REC_ME_MAP, 419 420 /** 421 * Holds dpb manager context 422 */ 423 MEM_REC_DPB_MGR, 424 425 /** 426 * Holds intermediate buffers needed during processing stage 427 * Memory for process contexts is allocated in this memtab 428 */ 429 MEM_REC_PROC_SCRATCH, 430 431 /** 432 * Holds buffers for vert_bs, horz_bs and QP (all frame level) 433 */ 434 MEM_REC_QUANT_PARAM, 435 436 /** 437 * Holds top row syntax information 438 */ 439 MEM_REC_TOP_ROW_SYN_INFO, 440 441 /** 442 * Holds buffers for vert_bs, horz_bs and QP (all frame level) 443 */ 444 MEM_REC_BS_QP, 445 446 /** 447 * Holds input buffer manager context 448 */ 449 MEM_REC_INP_PIC, 450 451 /** 452 * Holds output buffer manager context 453 */ 454 MEM_REC_OUT, 455 456 /** 457 * Holds picture buffer manager context and array of pic_buf_ts 458 * Also holds reference picture buffers in non-shared mode 459 */ 460 MEM_REC_REF_PIC, 461 462 /* 463 * Mem record for color space conversion 464 */ 465 MEM_REC_CSC, 466 467 /** 468 * NMB info struct 469 */ 470 MEM_REC_MB_INFO_NMB, 471 472 /** 473 * Rate control of memory records. 474 */ 475 MEM_REC_RC, 476 477 /** 478 * Place holder to compute number of memory records. 479 */ 480 MEM_REC_CNT = MEM_REC_RC + NUM_RC_MEMTABS, 481 482 /* 483 * Do not add anything below 484 */ 485 }; 486 487 #define DISABLE_DEBLOCK_INTERVAL 8 488 489 /** 490 **************************************************************************** 491 * Disable deblock levels 492 * Level 0 enables deblocking completely and level 4 disables completely 493 * Other levels are intermediate values to control deblocking level 494 **************************************************************************** 495 */ 496 enum 497 { 498 /** 499 * Enable deblocking completely 500 */ 501 DISABLE_DEBLK_LEVEL_0, 502 503 /** 504 * Disable only within MB edges - Not supported currently 505 */ 506 DISABLE_DEBLK_LEVEL_1, 507 508 /** 509 * Enable deblocking once in DEBLOCK_INTERVAL number of pictures 510 * and for I slices 511 */ 512 DISABLE_DEBLK_LEVEL_2, 513 514 /** 515 * Enable deblocking only for I slices 516 */ 517 DISABLE_DEBLK_LEVEL_3, 518 519 /** 520 * Disable deblocking completely 521 */ 522 DISABLE_DEBLK_LEVEL_4 523 }; 524 525 /** 526 **************************************************************************** 527 * Number of buffers for I/O based on format 528 **************************************************************************** 529 */ 530 531 /** Minimum number of input buffers */ 532 #define MIN_INP_BUFS 2 533 534 /** Minimum number of output buffers */ 535 #define MIN_OUT_BUFS 1 536 537 /** Minimum number of components in bitstream buffer */ 538 #define MIN_BITS_BUFS_COMP 1 539 540 /** Minimum number of components in raw buffer */ 541 #define MIN_RAW_BUFS_420_COMP 3 542 #define MIN_RAW_BUFS_422ILE_COMP 1 543 #define MIN_RAW_BUFS_RGB565_COMP 1 544 #define MIN_RAW_BUFS_RGBA8888_COMP 1 545 #define MIN_RAW_BUFS_420SP_COMP 2 546 547 /** Maximum number of active config paramter sets */ 548 #define MAX_ACTIVE_CONFIG_PARAMS 32 549 550 /** 551 ****************************************************************************** 552 * @brief Thresholds for luma & chroma to determine if the 8x8 subblock needs 553 * to be encoded or skipped 554 ****************************************************************************** 555 */ 556 #define LUMA_SUB_BLOCK_SKIP_THRESHOLD 4 557 #define LUMA_BLOCK_SKIP_THRESHOLD 5 558 #define CHROMA_BLOCK_SKIP_THRESHOLD 4 559 560 /** 561 ****************************************************************************** 562 * @brief defines the first byte of a NAL unit 563 * forbidden zero bit - nal_ref_idc - nal_unit_type 564 ****************************************************************************** 565 */ 566 /* [0 - 11 - 00111] */ 567 #define NAL_SPS_FIRST_BYTE 0x67 568 569 /* [0 - 11 - 01000] */ 570 #define NAL_PPS_FIRST_BYTE 0x68 571 572 /* [0 - 11 - 00001] */ 573 #define NAL_SLICE_FIRST_BYTE 0x61 574 575 /* [0 - 00 - 00001] */ 576 #define NAL_NON_REF_SLICE_FIRST_BYTE 0x01 577 578 /* [0 - 11 - 00101] */ 579 #define NAL_IDR_SLICE_FIRST_BYTE 0x65 580 581 /* [0 - 00 - 01100] */ 582 #define NAL_FILLER_FIRST_BYTE 0x0C 583 584 /* [0 - 00 - 00110] */ 585 #define NAL_SEI_FIRST_BYTE 0x06 586 587 #define H264_ALLOC_INTER_FRM_INTV 2 588 589 #define H264_MPEG_QP_MAP 255 590 591 #define MPEG2_QP_ELEM (H264_MPEG_QP_MAP + 1) 592 #define H264_QP_ELEM (MAX_H264_QP + 1) 593 594 #define H264_INIT_QUANT_I 26 595 #define H264_INIT_QUANT_P 34 596 597 #endif /*IH264E_DEFS_H_*/ 598