| /external/libxaac/decoder/armv7/ |
| D | ia_xheaacd_mps_reoder_mulshift_acc.s | 52 VMOV.I64 Q14, #0
53 VMOV.I64 Q15, #0
84 VSUB.I64 Q12, Q12, Q0
85 VSUB.I64 Q13, Q13, Q1
86 VSUB.I64 Q10, Q10, Q4
87 VSUB.I64 Q11, Q11, Q5
89 VADD.I64 Q12, Q12, Q13
90 VADD.I64 Q10, Q10, Q11
91 VADD.I64 Q12, Q12, Q10
92 VADD.I64 D24, D24, D25
[all …]
|
| D | ixheaacd_esbr_cos_sin_mod_loop2.s | 76 vadd.I64 q6, q4, q3
80 VSHRN.I64 D12, Q6, #32
81 VSHRN.I64 D14, Q7, #32
82 VSHRN.I64 D16, Q8, #32
107 vadd.I64 q6, q4, q3
111 VSHRN.I64 D12, Q6, #32
112 VSHRN.I64 D14, Q7, #32
113 VSHRN.I64 D16, Q8, #32
136 vadd.I64 q6, q2, q5
140 VSHRN.I64 D12, Q6, #32
[all …]
|
| D | ixheaacd_esbr_cos_sin_mod_loop1.s | 55 vadd.I64 q0, q4, q3
58 VSHRN.I64 D0, Q0, #32
59 VSHRN.I64 D2, Q1, #32
81 VADD.I64 Q0, Q5, Q2
84 VSHRN.I64 D0, Q0, #32
85 VSHRN.I64 D2, Q1, #32
107 vadd.I64 q0, q4, q3
110 VSHRN.I64 D0, Q0, #32
111 VSHRN.I64 D2, Q1, #32
133 VADD.I64 Q0, Q5, Q2
[all …]
|
| D | ixheaacd_mps_synt_pre_twiddle.s | 43 VSHRN.I64 D4, Q2, #31
44 VSHRN.I64 D6, Q3, #31
45 VSHRN.I64 D8, Q4, #31
46 VSHRN.I64 D10, Q5, #31
|
| D | ixheaacd_mps_synt_post_twiddle.s | 43 VSHRN.I64 D4, Q2, #31
44 VSHRN.I64 D6, Q3, #31
45 VSHRN.I64 D8, Q4, #31
46 VSHRN.I64 D10, Q5, #31
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInteger.td | 20 defm _I64 : I<(outs I64:$dst), (ins I64:$src), (outs), (ins),
21 [(set I64:$dst, (node I64:$src))],
31 defm _I64 : I<(outs I64:$dst), (ins I64:$lhs, I64:$rhs), (outs), (ins),
32 [(set I64:$dst, (node I64:$lhs, I64:$rhs))],
41 defm _I64 : I<(outs I32:$dst), (ins I64:$lhs, I64:$rhs), (outs), (ins),
42 [(set I32:$dst, (setcc I64:$lhs, I64:$rhs, cond))],
92 defm EQZ_I64 : I<(outs I32:$dst), (ins I64:$src), (outs), (ins),
93 [(set I32:$dst, (setcc I64:$src, 0, SETEQ))],
99 def : Pat<(rotl I64:$lhs, (and I64:$rhs, 63)), (ROTL_I64 I64:$lhs, I64:$rhs)>;
100 def : Pat<(rotr I64:$lhs, (and I64:$rhs, 63)), (ROTR_I64 I64:$lhs, I64:$rhs)>;
[all …]
|
| D | WebAssemblyInstrConv.td | 15 defm I32_WRAP_I64 : I<(outs I32:$dst), (ins I64:$src), (outs), (ins),
16 [(set I32:$dst, (trunc I64:$src))],
19 defm I64_EXTEND_S_I32 : I<(outs I64:$dst), (ins I32:$src), (outs), (ins),
20 [(set I64:$dst, (sext I32:$src))],
23 defm I64_EXTEND_U_I32 : I<(outs I64:$dst), (ins I32:$src), (outs), (ins),
24 [(set I64:$dst, (zext I32:$src))],
37 defm I64_EXTEND8_S_I64 : I<(outs I64:$dst), (ins I64:$src), (outs), (ins),
38 [(set I64:$dst, (sext_inreg I64:$src, i8))],
41 defm I64_EXTEND16_S_I64 : I<(outs I64:$dst), (ins I64:$src), (outs), (ins),
42 [(set I64:$dst, (sext_inreg I64:$src, i16))],
[all …]
|
| D | WebAssemblyRuntimeLibcallSignatures.cpp | 520 Subtarget.hasAddr64() ? wasm::ValType::I64 : wasm::ValType::I32; in getLibcallSignature()
540 Params.push_back(wasm::ValType::I64); in getLibcallSignature()
560 Params.push_back(wasm::ValType::I64); in getLibcallSignature()
575 Rets.push_back(wasm::ValType::I64); in getLibcallSignature()
579 Rets.push_back(wasm::ValType::I64); in getLibcallSignature()
583 Rets.push_back(wasm::ValType::I64); in getLibcallSignature()
584 Params.push_back(wasm::ValType::I64); in getLibcallSignature()
598 Params.push_back(wasm::ValType::I64); in getLibcallSignature()
599 Params.push_back(wasm::ValType::I64); in getLibcallSignature()
613 Params.push_back(wasm::ValType::I64); in getLibcallSignature()
[all …]
|
| D | WebAssemblyInstrAtomics.td | 45 I64:$timeout),
51 (ins P2Align:$p2align, offset32_op:$off, I32:$addr, I64:$exp,
52 I64:$timeout),
86 Pat<(i32 (kind I32:$addr, ty:$exp, I64:$timeout)),
87 (inst 0, 0, I32:$addr, ty:$exp, I64:$timeout)>;
95 Pat<(i32 (kind (operand I32:$addr, imm:$off), ty:$exp, I64:$timeout)),
96 (inst 0, imm:$off, I32:$addr, ty:$exp, I64:$timeout)>;
104 Pat<(i32 (kind imm:$off, ty:$exp, I64:$timeout)),
105 (inst 0, imm:$off, (CONST_I32 0), ty:$exp, I64:$timeout)>;
110 Pat<(i32 (kind (WebAssemblywrapper tglobaladdr:$off), ty:$exp, I64:$timeout)),
[all …]
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInteger.td | 62 def EQZ_I64 : I<(outs I32:$dst), (ins I64:$src),
63 [(set I32:$dst, (setcc I64:$src, 0, SETEQ))],
71 def : Pat<(rotl I64:$lhs, (and I64:$rhs, 63)), (ROTL_I64 I64:$lhs, I64:$rhs)>;
72 def : Pat<(rotr I64:$lhs, (and I64:$rhs, 63)), (ROTR_I64 I64:$lhs, I64:$rhs)>;
79 def SELECT_I64 : I<(outs I64:$dst), (ins I64:$lhs, I64:$rhs, I32:$cond),
80 [(set I64:$dst, (select I32:$cond, I64:$lhs, I64:$rhs))],
90 def : Pat<(select (i32 (setne I32:$cond, 0)), I64:$lhs, I64:$rhs),
91 (SELECT_I64 I64:$lhs, I64:$rhs, I32:$cond)>;
96 def : Pat<(select (i32 (seteq I32:$cond, 0)), I64:$lhs, I64:$rhs),
97 (SELECT_I64 I64:$rhs, I64:$lhs, I32:$cond)>;
|
| D | WebAssemblyInstrConv.td | 18 def I32_WRAP_I64 : I<(outs I32:$dst), (ins I64:$src),
19 [(set I32:$dst, (trunc I64:$src))],
22 def I64_EXTEND_S_I32 : I<(outs I64:$dst), (ins I32:$src),
23 [(set I64:$dst, (sext I32:$src))],
25 def I64_EXTEND_U_I32 : I<(outs I64:$dst), (ins I32:$src),
26 [(set I64:$dst, (zext I32:$src))],
46 def I64_TRUNC_S_F32 : I<(outs I64:$dst), (ins F32:$src),
47 [(set I64:$dst, (fp_to_sint F32:$src))],
49 def I64_TRUNC_U_F32 : I<(outs I64:$dst), (ins F32:$src),
50 [(set I64:$dst, (fp_to_uint F32:$src))],
[all …]
|
| D | WebAssemblyInstrFormats.td | 36 def _I64 : I<(outs I64:$dst), (ins I64:$src),
37 [(set I64:$dst, (node I64:$src))],
44 def _I64 : I<(outs I64:$dst), (ins I64:$lhs, I64:$rhs),
45 [(set I64:$dst, (node I64:$lhs, I64:$rhs))],
68 def _I64 : I<(outs I32:$dst), (ins I64:$lhs, I64:$rhs),
69 [(set I32:$dst, (setcc I64:$lhs, I64:$rhs, cond))],
|
| D | WebAssemblyInstrMemory.td | 64 def LOAD_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr,
157 def LOAD8_S_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr,
160 def LOAD8_U_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr,
163 def LOAD16_S_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr,
166 def LOAD16_U_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr,
169 def LOAD32_S_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr,
172 def LOAD32_U_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr,
459 def STORE_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr,
460 P2Align:$p2align, I64:$val), [],
473 def : Pat<(store I64:$val, I32:$addr), (STORE_I64 0, I32:$addr, 0, I64:$val)>;
[all …]
|
| /external/rust/crates/protobuf/src/reflect/dynamic/ |
| D | map.rs | 20 I64(HashMap<i64, ReflectValueBox>), enumerator
31 Maps::I64(map) => fmt::Debug::fmt(map, f), in fmt()
44 Maps::I64(m) => m.len(), in len()
55 Maps::I64(m) => m.is_empty(), in is_empty()
66 Maps::I64(m) => m.clear(), in clear()
77 Maps::I64(..) => RuntimeType::I64, in key_type()
107 RuntimeType::I64 => Maps::I64(HashMap::new()), in new()
154 Maps::I64(m) => ReflectMapIter::new(DynamicMapIterImpl { in reflect_iter()
182 (Maps::I64(m), ReflectValueRef::I64(v)) => m.get(&v), in get()
196 (Maps::I64(m), ReflectValueBox::I64(k)) => m.insert(*k, value), in insert()
|
| D | repeated.rs | 23 I64(Vec<i64>), enumerator
39 DynamicRepeated::I64(v) => ReflectRepeatedIter::new_slice(&v), in reflect_iter()
61 DynamicRepeated::I64(v) => ReflectRepeatedDrainIter::new_vec(v), in reflect_drain_iter()
82 DynamicRepeated::I64(v) => v.len(), in len()
98 DynamicRepeated::I64(v) => ReflectValueRef::I64(v[index]), in get()
118 DynamicRepeated::I64(v) => v.set(index, value), in set()
146 DynamicRepeated::I64(vs) => ReflectRepeated::push(vs, value), in push()
174 DynamicRepeated::I64(vs) => vs.extend(values.repeated.data_i64()), in reflect_extend()
192 DynamicRepeated::I64(vs) => vs.clear(), in clear()
208 DynamicRepeated::I64(..) => RuntimeType::I64, in element_type()
[all …]
|
| /external/rust/crates/protobuf/src/reflect/ |
| D | runtime_type_box.rs | 19 I64, enumerator
44 RuntimeType::I64 => ReflectValueRef::I64(0), in default_value_ref()
71 field_descriptor_proto::Type::TYPE_INT64 => RuntimeType::I64, in from_proto_type()
73 field_descriptor_proto::Type::TYPE_SINT64 => RuntimeType::I64, in from_proto_type()
76 field_descriptor_proto::Type::TYPE_SFIXED64 => RuntimeType::I64, in from_proto_type()
105 RuntimeType::I64 => value.parse().map_err(|_| ()).map(ReflectValueBox::I64), in parse_proto_default_value()
139 RuntimeType::I64 => write!(f, "i64"), in fmt()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonIntrinsics.td | 25 : Pat <(IntID I64:$Rs),
26 (MI I64:$Rs)>;
43 : Pat<(IntID I64:$Rs, imm:$It),
44 (MI I64:$Rs, imm:$It)>;
47 : Pat<(IntID I32:$Rs, I64:$Rt),
48 (MI I32:$Rs, I64:$Rt)>;
55 : Pat <(IntID I64:$Rs, I64:$Rt),
56 (MI I64:$Rs, I64:$Rt)>;
79 : Pat <(IntID I32:$Rp, I64:$Rs, I64:$Rt),
80 (MI (C2_tfrrp I32:$Rp), I64:$Rs, I64:$Rt)>;
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonPatterns.td | 412 def: OpR_R_pat<F2_conv_d2sf, pf1<sint_to_fp>, f32, I64>;
414 def: OpR_R_pat<F2_conv_d2df, pf1<sint_to_fp>, f64, I64>;
417 def: OpR_R_pat<F2_conv_ud2sf, pf1<uint_to_fp>, f32, I64>;
419 def: OpR_R_pat<F2_conv_ud2df, pf1<uint_to_fp>, f64, I64>;
434 def: Pat<(i64 (bitconvert F64:$v)), (I64:$v)>;
435 def: Pat<(f64 (bitconvert I64:$v)), (F64:$v)>;
456 def: Pat<(sext_inreg I64:$Rs, i32), (A2_sxtw (LoReg $Rs))>;
457 def: Pat<(sext_inreg I64:$Rs, i16), (A2_sxtw (A2_sxth (LoReg $Rs)))>;
458 def: Pat<(sext_inreg I64:$Rs, i8), (A2_sxtw (A2_sxtb (LoReg $Rs)))>;
464 def: Pat<(i32 (trunc I64:$Rs)), (LoReg $Rs)>;
[all …]
|
| D | HexagonIntrinsics.td | 20 : Pat <(IntID I32:$Rs, I64:$Rt),
21 (MI I32:$Rs, I64:$Rt)>;
94 def : Pat <(int_hexagon_S2_asr_i_p_rnd_goodsyntax I64:$Rs, (i32 0)),
95 (A2_combinew (HiReg I64:$Rs), (LoReg I64:$Rs))>;
96 def : Pat <(int_hexagon_S5_vasrhrnd_goodsyntax I64:$Rs, (i32 0)),
97 (A2_combinew (HiReg I64:$Rs), (LoReg I64:$Rs))>;
98 def : Pat <(int_hexagon_S5_asrhub_rnd_sat_goodsyntax I64:$Rs, (i32 0)),
99 (S2_vsathub I64:$Rs)>;
104 def : Pat <(int_hexagon_S2_asr_i_p_rnd_goodsyntax I64:$Rs, u6_0ImmPred_timm:$imm),
105 (S2_asr_i_p_rnd I64:$Rs, (UDEC1 u6_0ImmPred:$imm))>;
[all …]
|
| /external/rust/crates/protobuf/src/reflect/value/ |
| D | value_ref.rs | 27 I64(i64), enumerator
57 ReflectValueRef::I64(v) => write!(f, "{}", v), in fmt()
80 ReflectValueRef::I64(..) => RuntimeType::I64, in get_type()
97 ReflectValueRef::I64(v) => *v != 0, in is_non_zero()
127 ReflectValueRef::I64(v) => Some(v), in to_i64()
210 ReflectValueRef::I64(v) => ReflectValueBox::I64(*v), in to_box()
238 (I64(a), I64(b)) => a == b, in reflect_eq()
270 (I64(a), I64(b)) => a == b, in eq()
301 I64(v) => Hash::hash(&v, state), in hash()
338 ReflectValueRef::I64(v) in from()
|
| /external/rust/crates/protobuf/2.27.1/src/reflect/ |
| D | value.rs | 39 ReflectValueRef::I64(v) => ReflectValueRef::I64(v), in as_ref_copy()
70 ReflectValueRef::I64(*self) in as_ref()
149 I64(i64), enumerator
175 ReflectValueRef::I64(v) => v != 0, in is_non_zero()
|
| /external/rust/crates/bindgen/ir/ |
| D | int.rs | 67 I64, enumerator
99 SChar | Short | Int | Long | LongLong | I8 | I16 | I32 | I64 | in is_signed()
117 U64 | I64 => 8, in known_size()
|
| /external/vixl/examples/aarch32/ |
| D | pi.cc | 50 __ Vmov(I64, d10, 0); // d10 = 0.0; in GenerateApproximatePi()
51 __ Vmov(I64, d11, 0); // d11 = 0.0; in GenerateApproximatePi()
52 __ Vmov(I64, d12, 0); // d12 = 0.0; in GenerateApproximatePi()
53 __ Vmov(I64, d13, 0); // d13 = 0.0 in GenerateApproximatePi()
|
| /external/tensorflow/tensorflow/compiler/mlir/lite/ir/ |
| D | tfl_ops.td | 121 def TFL_I64Tensor : TFL_TensorOf<[I64]>;
493 TFL_1DTensorOfOrNone<[F32, I32, I64]>:$bias,
545 ins TFL_TensorOf<[F32, I32, I64, QI8, QUI8, QI16]>:$lhs,
546 TFL_TensorOf<[F32, I32, I64, QI8, QUI8, QI16]>:$rhs,
549 let results = (outs TFL_TensorOf<[F32, I32, I64, QI8, QUI8, QI16]>:$output);
666 TFL_TensorOfOrNone<[F32, QI32, I64]>:$bias,
810 [F32, I64, I32, I16, I8, QI8, QUI8, UI8, I1]>:$values,
817 [F32, I64, I32, I16, I8, QI8, QUI8, UI8, I1]>:$output
969 ins TFL_TensorOf<[F32, I32, I64]>:$input,
975 let results = (outs TFL_TensorOf<[F32, I32, I64]>:$output);
[all …]
|
| /external/tensorflow/tensorflow/compiler/mlir/tfrt/jit/python_binding/ |
| D | conversion_utils.cc | 54 case DType::I64: in ToPythonStructFormat()
98 return DType::I64; in FromPythonStructFormat()
100 return DType::I64; in FromPythonStructFormat()
|