| /external/llvm/lib/Target/AArch64/ |
| D | AArch64FastISel.cpp | 203 unsigned emitLogicalOp(unsigned ISDOpc, MVT RetVT, const Value *LHS,
205 unsigned emitLogicalOp_ri(unsigned ISDOpc, MVT RetVT, unsigned LHSReg,
207 unsigned emitLogicalOp_rs(unsigned ISDOpc, MVT RetVT, unsigned LHSReg,
1520 unsigned AArch64FastISel::emitLogicalOp(unsigned ISDOpc, MVT RetVT, in emitLogicalOp() argument
1545 ResultReg = emitLogicalOp_ri(ISDOpc, RetVT, LHSReg, LHSIsKill, Imm); in emitLogicalOp()
1567 ResultReg = emitLogicalOp_rs(ISDOpc, RetVT, LHSReg, LHSIsKill, RHSReg, in emitLogicalOp()
1583 ResultReg = emitLogicalOp_rs(ISDOpc, RetVT, LHSReg, LHSIsKill, RHSReg, in emitLogicalOp()
1596 ResultReg = fastEmit_rr(VT, VT, ISDOpc, LHSReg, LHSIsKill, RHSReg, RHSIsKill); in emitLogicalOp()
1604 unsigned AArch64FastISel::emitLogicalOp_ri(unsigned ISDOpc, MVT RetVT, in emitLogicalOp_ri() argument
1624 unsigned Idx = ISDOpc - ISD::AND; in emitLogicalOp_ri()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64FastISel.cpp | 248 unsigned emitLogicalOp(unsigned ISDOpc, MVT RetVT, const Value *LHS,
250 unsigned emitLogicalOp_ri(unsigned ISDOpc, MVT RetVT, unsigned LHSReg,
252 unsigned emitLogicalOp_rs(unsigned ISDOpc, MVT RetVT, unsigned LHSReg,
1607 unsigned AArch64FastISel::emitLogicalOp(unsigned ISDOpc, MVT RetVT, in emitLogicalOp() argument
1632 ResultReg = emitLogicalOp_ri(ISDOpc, RetVT, LHSReg, LHSIsKill, Imm); in emitLogicalOp()
1654 ResultReg = emitLogicalOp_rs(ISDOpc, RetVT, LHSReg, LHSIsKill, RHSReg, in emitLogicalOp()
1670 ResultReg = emitLogicalOp_rs(ISDOpc, RetVT, LHSReg, LHSIsKill, RHSReg, in emitLogicalOp()
1683 ResultReg = fastEmit_rr(VT, VT, ISDOpc, LHSReg, LHSIsKill, RHSReg, RHSIsKill); in emitLogicalOp()
1691 unsigned AArch64FastISel::emitLogicalOp_ri(unsigned ISDOpc, MVT RetVT, in emitLogicalOp_ri() argument
1711 unsigned Idx = ISDOpc - ISD::AND; in emitLogicalOp_ri()
[all …]
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| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 153 unsigned emitLogicalOp(unsigned ISDOpc, MVT RetVT, const Value *LHS,
246 unsigned MipsFastISel::emitLogicalOp(unsigned ISDOpc, MVT RetVT, in emitLogicalOp() argument
253 switch (ISDOpc) { in emitLogicalOp()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 201 unsigned emitLogicalOp(unsigned ISDOpc, MVT RetVT, const Value *LHS,
296 unsigned MipsFastISel::emitLogicalOp(unsigned ISDOpc, MVT RetVT, in emitLogicalOp() argument
303 switch (ISDOpc) { in emitLogicalOp()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 2328 unsigned ISDOpc, NewOpc; in LowerCTLZ_CTTZ() local
2330 ISDOpc = ISD::CTLZ_ZERO_UNDEF; in LowerCTLZ_CTTZ()
2333 ISDOpc = ISD::CTTZ_ZERO_UNDEF; in LowerCTLZ_CTTZ()
2356 SDValue OprLo = DAG.getNode(ISDOpc, SL, MVT::i32, Lo); in LowerCTLZ_CTTZ()
2357 SDValue OprHi = DAG.getNode(ISDOpc, SL, MVT::i32, Hi); in LowerCTLZ_CTTZ()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 8456 unsigned ISDOpc = IsCallBr ? ISD::INLINEASM_BR : ISD::INLINEASM; in visitInlineAsm() local
8457 Chain = DAG.getNode(ISDOpc, getCurSDLoc(), in visitInlineAsm()
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