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Searched refs:IsSignallingNaN (Results 1 – 7 of 7) sorted by relevance

/external/vixl/src/
Dutils-vixl.cc300 if (IsSignallingNaN(value)) { in FPToFloat()
345 if (IsSignallingNaN(value)) { in FPToFloat()
408 if (IsSignallingNaN(value)) { in FPToDouble()
462 if (IsSignallingNaN(value)) { in FPToFloat16()
517 if (IsSignallingNaN(value)) { in FPToFloat16()
Dutils-vixl.h412 inline bool IsSignallingNaN(double num) { in IsSignallingNaN() function
422 inline bool IsSignallingNaN(float num) { in IsSignallingNaN() function
432 inline bool IsSignallingNaN(Float16 num) { in IsSignallingNaN() function
440 return IsNaN(num) && !IsSignallingNaN(num); in IsQuietNaN()
/external/vixl/test/aarch64/
Dtest-assembler-fp-aarch64.cc914 VIXL_ASSERT(IsSignallingNaN(sig1)); in TEST()
915 VIXL_ASSERT(IsSignallingNaN(sig2)); in TEST()
916 VIXL_ASSERT(IsSignallingNaN(siga)); in TEST()
1126 VIXL_ASSERT(IsSignallingNaN(sig1)); in TEST()
1127 VIXL_ASSERT(IsSignallingNaN(sig2)); in TEST()
1128 VIXL_ASSERT(IsSignallingNaN(siga)); in TEST()
1535 VIXL_ASSERT(IsSignallingNaN(snan)); in TEST()
1639 VIXL_ASSERT(IsSignallingNaN(snan)); in TEST()
4919 VIXL_ASSERT(IsSignallingNaN(sn)); in TEST()
4995 VIXL_ASSERT(IsSignallingNaN(sn)); in TEST()
[all …]
Dtest-assembler-sve-aarch64.cc17227 VIXL_ASSERT(IsSignallingNaN(sa)); in TEST_SVE()
17228 VIXL_ASSERT(IsSignallingNaN(sn)); in TEST_SVE()
17229 VIXL_ASSERT(IsSignallingNaN(sm)); in TEST_SVE()
17383 VIXL_ASSERT(IsSignallingNaN(sa)); in TEST_SVE()
17384 VIXL_ASSERT(IsSignallingNaN(sn)); in TEST_SVE()
17385 VIXL_ASSERT(IsSignallingNaN(sm)); in TEST_SVE()
17539 VIXL_ASSERT(IsSignallingNaN(sa)); in TEST_SVE()
17540 VIXL_ASSERT(IsSignallingNaN(sn)); in TEST_SVE()
17541 VIXL_ASSERT(IsSignallingNaN(sm)); in TEST_SVE()
Dtest-assembler-neon-aarch64.cc10592 if (IsSignallingNaN(n)) { in MinMaxHelper()
10595 } else if (IsSignallingNaN(m)) { in MinMaxHelper()
10636 VIXL_ASSERT(IsSignallingNaN(snan)); in TEST()
/external/vixl/src/aarch64/
Dsimulator-aarch64.h4792 if (IsSignallingNaN(op)) {
4800 if (IsSignallingNaN(op1)) {
4802 } else if (IsSignallingNaN(op2)) {
4817 if (IsSignallingNaN(op1)) {
4819 } else if (IsSignallingNaN(op2)) {
4821 } else if (IsSignallingNaN(op3)) {
Dsimulator-aarch64.cc493 VIXL_ASSERT(IsSignallingNaN(RawbitsToDouble(nan_bits & kDRegMask))); in ResetVRegisters()
494 VIXL_ASSERT(IsSignallingNaN(RawbitsToFloat(nan_bits & kSRegMask))); in ResetVRegisters()
991 if (IsSignallingNaN(val0) || IsSignallingNaN(val1) || in FPCompare()