| /external/llvm/test/CodeGen/AMDGPU/ |
| D | srl.ll | 10 ; EG: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
27 ; EG: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
28 ; EG: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
49 ; EG: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
50 ; EG: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
51 ; EG: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
52 ; EG: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
70 ; EG-DAG: LSHR {{\*? *}}[[LOSMTMP:T[0-9]+\.[XYZW]]], [[OPLO:T[0-9]+\.[XYZW]]], [[SHIFT]]
72 ; EG-DAG: LSHR {{\*? *}}[[HISM:T[0-9]+\.[XYZW]]], [[OPHI]], {{PS|[[SHIFT]]|PV\.[XYZW]}}
75 ; EG-DAG: LSHR {{\*? *}}[[LOBIG:T[0-9]+\.[XYZW]]], [[OPHI]], [[SHIFT]]
[all …]
|
| D | fp_to_sint.ll | 56 ; EG-DAG: LSHR
66 ; EG-DAG: LSHR
67 ; EG-DAG: LSHR
88 ; EG-DAG: LSHR
98 ; EG-DAG: LSHR
99 ; EG-DAG: LSHR
109 ; EG-DAG: LSHR
119 ; EG-DAG: LSHR
120 ; EG-DAG: LSHR
139 ; EG-DAG: LSHR
[all …]
|
| D | fp_to_uint.ll | 47 ; EG-DAG: LSHR
57 ; EG-DAG: LSHR
58 ; EG-DAG: LSHR
77 ; EG-DAG: LSHR
87 ; EG-DAG: LSHR
88 ; EG-DAG: LSHR
98 ; EG-DAG: LSHR
108 ; EG-DAG: LSHR
109 ; EG-DAG: LSHR
128 ; EG-DAG: LSHR
[all …]
|
| D | set-dx10.ll | 8 ; CHECK: LSHR
22 ; CHECK: LSHR
34 ; CHECK: LSHR
48 ; CHECK: LSHR
60 ; CHECK: LSHR
74 ; CHECK: LSHR
86 ; CHECK: LSHR
100 ; CHECK: LSHR
112 ; CHECK: LSHR
126 ; CHECK: LSHR
[all …]
|
| D | unsupported-cc.ll | 6 ; CHECK: LSHR
18 ; CHECK: LSHR
33 ; CHECK-NEXT: LSHR *
43 ; CHECK: LSHR
55 ; CHECK: LSHR
67 ; CHECK: LSHR
79 ; CHECK: LSHR
94 ; CHECK-NEXT: LSHR *
104 ; CHECK: LSHR
116 ; CHECK: LSHR
|
| D | image-resource-id.ll | 8 ; EG-NEXT: LSHR
22 ; EG-NEXT: LSHR
38 ; EG-NEXT: LSHR
52 ; EG-NEXT: LSHR
68 ; EG-NEXT: LSHR
83 ; EG-NEXT: LSHR
98 ; EG-NEXT: LSHR
113 ; EG-NEXT: LSHR
130 ; EG-NEXT: LSHR
145 ; EG-NEXT: LSHR
[all …]
|
| D | shl.ll | 58 ;EG: LSHR {{\* *}}[[TEMP:T[0-9]+\.[XYZW]]], [[OPLO:T[0-9]+\.[XYZW]]], {{[[COMPSH]]|PV.[XYZW]}}
60 ;EG-DAG: LSHR {{\*? *}}[[OVERF:T[0-9]+\.[XYZW]]], {{[[TEMP]]|PV.[XYZW]}}, 1
86 ;EG-DAG: LSHR {{\*? *}}[[COMPSHA]]
87 ;EG-DAG: LSHR {{\*? *}}[[COMPSHB]]
88 ;EG-DAG: LSHR {{.*}}, 1
89 ;EG-DAG: LSHR {{.*}}, 1
127 ;EG-DAG: LSHR {{\*? *}}[[COMPSHA]]
128 ;EG-DAG: LSHR {{\*? *}}[[COMPSHB]]
129 ;EG-DAG: LSHR {{\*? *}}[[COMPSHC]]
130 ;EG-DAG: LSHR {{\*? *}}[[COMPSHD]]
[all …]
|
| D | sampler-resource-id.ll | 6 ; EG-NEXT: LSHR
18 ; EG-NEXT: LSHR
30 ; EG-NEXT: LSHR
|
| D | bfe_uint.ll | 15 ; implmented with a LSHR instruction, which is better, because LSHR has less
|
| D | sra.ll | 70 ; EG-DAG: LSHR {{\*? *}}[[LOSMTMP:T[0-9]+\.[XYZW]]], [[OPLO:T[0-9]+\.[XYZW]]], [[SHIFT]]
100 ; EG-DAG: LSHR {{.*}}, [[SHA]]
101 ; EG-DAG: LSHR {{.*}}, [[SHB]]
162 ; EG-DAG: LSHR {{.*}}, [[SHA]]
163 ; EG-DAG: LSHR {{.*}}, [[SHB]]
164 ; EG-DAG: LSHR {{.*}}, [[SHA]]
165 ; EG-DAG: LSHR {{.*}}, [[SHB]]
|
| D | literals.ll | 10 ; CHECK: LSHR
27 ; CHECK: LSHR
|
| D | sext-in-reg.ll | 15 ; EG: LSHR * [[ADDR]]
33 ; EG-NEXT: LSHR * [[ADDR]]
51 ; EG-NEXT: LSHR * [[ADDR]]
69 ; EG-NEXT: LSHR * [[ADDR]]
243 ; EG: LSHR {{\*?}} [[ADDR]]
266 ; EG: LSHR {{\*?}} [[ADDR]]
284 ; EG: LSHR {{\*?}} [[ADDR]]
305 ; EG: LSHR {{\*?}} [[ADDR]]
322 ; EG: LSHR {{\*?}} [[ADDR]]
343 ; EG: LSHR {{\*?}} [[ADDR]]
[all …]
|
| D | sext-in-reg-failure-r600.ll | 13 ; EG: LSHR {{\*?}} [[ADDR]]
|
| D | trunc.ll | 14 ; EG: LSHR
|
| /external/apache-commons-bcel/src/main/java/org/apache/bcel/generic/ |
| D | LSHR.java | 26 public class LSHR extends ArithmeticInstruction { class
28 public LSHR() { in LSHR() method in LSHR
29 super(org.apache.bcel.Const.LSHR); in LSHR()
|
| D | InstructionConstants.java | 116 ArithmeticInstruction LSHR = new LSHR(); field
251 INSTRUCTIONS[Const.LSHR] = LSHR; in Clinit()
|
| D | InstructionConst.java | 115 public static final ArithmeticInstruction LSHR = new LSHR(); field in InstructionConst
246 INSTRUCTIONS[Const.LSHR] = LSHR;
|
| D | ArithmeticInstruction.java | 87 case Const.LSHR: in getType()
|
| /external/llvm/test/Transforms/InstCombine/ |
| D | bitreverse-hang.ll | 10 ; | LSHR
14 ; | LSHR
|
| /external/llvm/test/Transforms/CodeGenPrepare/ |
| D | bitreverse-hang.ll | 10 ; | LSHR
14 ; | LSHR
|
| /external/llvm/test/Transforms/GVN/ |
| D | load-pre-nonlocal.ll | 58 ; CHECK: [[LSHR:%[0-9]+]] = lshr i64 %0, 32, !dbg [[LSHR_LOC:![0-9]+]]
59 ; CHECK: trunc i64 [[LSHR]] to i32
|
| /external/javassist/src/main/javassist/bytecode/ |
| D | Opcode.java | 205 int LSHR = 123; field
|
| /external/ow2-asm/asm/src/main/java/org/objectweb/asm/ |
| D | Opcodes.java | 487 int LSHR = 123; // - field
|
| /external/ow2-asm/asm-analysis/src/main/java/org/objectweb/asm/tree/analysis/ |
| D | SourceInterpreter.java | 149 case LSHR: in binaryOperation()
|
| /external/mesa3d/src/gallium/drivers/swr/rasterizer/jitter/ |
| D | builder_misc.cpp | 867 Value* vExp = LSHR(SHL(vFloatInt, VIMMED1(1)), VIMMED1(24)); in VCVT_F32_FIXED_SI()
936 Value* vExp = LSHR(SHL(vFloatInt, VIMMED1(1)), VIMMED1(24)); in VCVT_F32_FIXED_UI()
941 fixed = LSHR(vFixed, vExtraBits, name); in VCVT_F32_FIXED_UI()
965 fVal = UI_TO_FP(LSHR(vFixed, VIMMED1(numFracBits)), mSimdFP32Ty, name); in VCVT_FIXED_UI_F32()
|