/external/llvm/test/CodeGen/AArch64/ |
D | arm64-vcombine.ll | 3 ; LowerCONCAT_VECTORS() was reversing the order of two parts.
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.h | 125 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
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D | HexagonISelLowering.cpp | 2532 HexagonTargetLowering::LowerCONCAT_VECTORS(SDValue Op, in LowerCONCAT_VECTORS() function in HexagonTargetLowering 2770 case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, DAG); in LowerOperation()
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.h | 36 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
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D | AMDGPUISelLowering.cpp | 707 case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, DAG); in LowerOperation() 895 SDValue AMDGPUTargetLowering::LowerCONCAT_VECTORS(SDValue Op, in LowerCONCAT_VECTORS() function in AMDGPUTargetLowering
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.h | 523 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
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D | NVPTXISelLowering.cpp | 1680 NVPTXTargetLowering::LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const { in LowerCONCAT_VECTORS() function in NVPTXTargetLowering 1838 return LowerCONCAT_VECTORS(Op, DAG); in LowerOperation()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.h | 559 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
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D | NVPTXISelLowering.cpp | 1890 NVPTXTargetLowering::LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const { in LowerCONCAT_VECTORS() function in NVPTXTargetLowering 2190 return LowerCONCAT_VECTORS(Op, DAG); in LowerOperation()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.h | 45 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
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D | AMDGPUISelLowering.cpp | 1131 case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, DAG); in LowerOperation() 1223 SDValue AMDGPUTargetLowering::LowerCONCAT_VECTORS(SDValue Op, in LowerCONCAT_VECTORS() function in AMDGPUTargetLowering
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.h | 518 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.h | 160 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
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D | HexagonISelLowering.cpp | 2581 HexagonTargetLowering::LowerCONCAT_VECTORS(SDValue Op, in LowerCONCAT_VECTORS() function in HexagonTargetLowering 2903 case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, DAG); in LowerOperation()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.h | 751 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 6413 static SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) { in LowerCONCAT_VECTORS() function 6807 N0 = LowerCONCAT_VECTORS(N0, DAG); in LowerSDIV() 6843 N0 = LowerCONCAT_VECTORS(N0, DAG); in LowerUDIV() 7195 case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, DAG); in LowerOperation()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 8293 static SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG, in LowerCONCAT_VECTORS() function 8740 N0 = LowerCONCAT_VECTORS(N0, DAG, ST); in LowerSDIV() 8777 N0 = LowerCONCAT_VECTORS(N0, DAG, ST); in LowerUDIV() 9338 case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, DAG, Subtarget); in LowerOperation()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 7003 static SDValue LowerCONCAT_VECTORS(SDValue Op, in LowerCONCAT_VECTORS() function 21675 case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, Subtarget, DAG); in LowerOperation()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 10359 static SDValue LowerCONCAT_VECTORS(SDValue Op, in LowerCONCAT_VECTORS() function 28550 case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, Subtarget, DAG); in LowerOperation()
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