Searched refs:MCInst_insert0 (Results 1 – 4 of 4) sorted by relevance
| /external/capstone/ |
| D | MCInst.h | 118 void MCInst_insert0(MCInst *inst, int index, MCOperand *Op);
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| D | MCInst.c | 44 void MCInst_insert0(MCInst *inst, int index, MCOperand *Op) in MCInst_insert0() function
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| /external/capstone/arch/PowerPC/ |
| D | PPCDisassembler.c | 308 MCInst_insert0(Inst, 0, MCOperand_CreateReg1(Inst, GP0Regs[Base])); in decodeMemRIOperands()
332 MCInst_insert0(Inst, 0, MCOperand_CreateReg1(Inst, GP0Regs[Base])); in decodeMemRIXOperands()
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| /external/capstone/arch/ARM/ |
| D | ARMDisassembler.c | 587 MCInst_insert0(MI, i, MCOperand_CreateReg1(MI, InITBlock ? 0 : ARM_CPSR)); in AddThumb1SBit()
593 MCInst_insert0(MI, i, MCOperand_CreateReg1(MI, InITBlock ? 0 : ARM_CPSR)); in AddThumb1SBit()
656 MCInst_insert0(MI, i, MCOperand_CreateImm1(MI, CC)); in AddThumbPredicate()
658 MCInst_insert0(MI, i+1, MCOperand_CreateReg1(MI, 0)); in AddThumbPredicate()
660 MCInst_insert0(MI, i+1, MCOperand_CreateReg1(MI, ARM_CPSR)); in AddThumbPredicate()
665 MCInst_insert0(MI, i, MCOperand_CreateImm1(MI, CC)); in AddThumbPredicate()
667 MCInst_insert0(MI, i+1, MCOperand_CreateReg1(MI, 0)); in AddThumbPredicate()
669 MCInst_insert0(MI, i+1, MCOperand_CreateReg1(MI, ARM_CPSR)); in AddThumbPredicate()
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