/external/clang/test/CodeGenObjCXX/ |
D | lambda-expressions.mm | 2 …e-darwin10.0.0 -emit-llvm -o - %s -fexceptions -std=c++11 -fblocks | FileCheck -check-prefix=MRC %s 7 // MRC: @OBJC_METH_VAR_NAME{{.*}} = private global [5 x i8] c"copy\00" 8 // MRC: @OBJC_METH_VAR_NAME{{.*}} = private global [12 x i8] c"autorelease\00" 9 // MRC-LABEL: define i32 ()* @_Z1fv( 10 // MRC-LABEL: define internal i32 ()* @"_ZZ1fvENK3$_0cvU13block_pointerFivEEv" 11 // MRC: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*) 12 // MRC: store i8* bitcast (i32 (i8*)* @"___ZZ1fvENK3$_0cvU13block_pointerFivEEv_block_invoke" to i8… 13 // MRC: call i32 ()* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 ()* (i8*, i8*)*) 14 // MRC: call i32 ()* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 ()* (i8*, i8*)*) 15 // MRC: ret i32 ()* [all …]
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/external/clang/test/Driver/ |
D | objc-weak.m | 17 …macosx -mmacosx-version-min=10.7 -S -### %s -fobjc-weak 2>&1 | FileCheck %s --check-prefix MRC-WEAK 18 …-version-min=10.7 -S -### %s -fno-objc-weak -fobjc-weak 2>&1 | FileCheck %s --check-prefix MRC-WEAK 19 // MRC-WEAK: -fobjc-weak 21 … -mmacosx-version-min=10.7 -S -### %s -fno-objc-weak 2>&1 | FileCheck %s --check-prefix MRC-NO-WEAK 22 …rsion-min=10.7 -S -### %s -fobjc-weak -fno-objc-weak 2>&1 | FileCheck %s --check-prefix MRC-NO-WEAK 23 // MRC-NO-WEAK: -fno-objc-weak 25 …sx-version-min=10.5 -S -### %s -fobjc-weak 2>&1 | FileCheck %s --check-prefix MRC-WEAK-NOTSUPPORTED 26 …10.5 -S -### %s -fno-objc-weak -fobjc-weak 2>&1 | FileCheck %s --check-prefix MRC-WEAK-NOTSUPPORTED 27 // MRC-WEAK-NOTSUPPORTED: error: -fobjc-weak is not supported on the current deployment target
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/external/arm-neon-tests/ |
D | InitCache.s | 18 MRC p15, 0, r0, c1, c0, 0 ; read CP15 register 1 into r0 30 MRC p15, 0, r0, c1, c0, 1 ; Read Auxiliary Control Register 42 MRC p15, 0, r0, c1, c0, 0 ; read CP15 register 1 into r0
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D | Init.s | 33 MRC p15, 0, r0, c1, c0, 0 ; Read CP15 Control Register into r0
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/external/clang/test/CodeGenObjC/ |
D | attr-noreturn.m | 1 …x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-MRC 62 // CHECK-MRC: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}… 79 // CHECK-MRC: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}…
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/external/clang/test/ARCMT/ |
D | GC-no-arc-runtime.m | 7 // MRC __weak broke this test somehow.
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/external/llvm/test/CodeGen/MIR/ARM/ |
D | cfi-same-value.mir | 39 %r4 = MRC 15, 0, 13, 0, 3, 14, _
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/external/llvm/test/MC/ARM/ |
D | thumb2-diagnostics.s | 35 @ Out of range immediates for MRC/MRC2/MRRC/MRRC2
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D | diagnostics.s | 175 @ Out of range immediates for MRC/MRC2/MRRC/MRRC2
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/external/clang/include/clang/Basic/ |
D | LangOptions.def | 217 LANGOPT(ObjCWeak , 1, 0, "Objective-C __weak in ARC and MRC files")
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/external/OpenCSD/decoder/tests/snapshots/TC2/ds5-dumps/ |
D | etmv3_0x12.txt | 8 Instruction 3 S:0xC003F604 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false 31 Instruction 26 S:0xC003F38C 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false 55 Instruction 50 S:0xC0035C4A 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false 1168 Instruction 1139 S:0xC004EC38 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false 1395 Instruction 1362 S:0xC0055380 0xEE1D2F90 63 MRC p15,#0x0,r2,c13,c0,#4 false 1660 Instruction 1617 S:0xC0020EE0 0xEE1D2F90 12 MRC p15,#0x0,r2,c13,c0,#4 false 1677 Instruction 1634 S:0xC0025ACE 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false 1684 Instruction 1641 S:0xC0035BA6 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false 1870 Instruction 1823 S:0xC0020EE0 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false 1964 Instruction 1911 S:0xC000D612 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false
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D | ptmv1_0x13.txt | 268 Instruction 243 S:0xC0055380 0xEE1D2F90 0 MRC p15,#0x0,r2,c13,c0,#4 false 519 Instruction 486 S:0xC0012236 0xEE113E93 0 MRC p14,#0x0,r3,c1,c3,#4 false 542 Instruction 507 S:0xC00121F0 0xEE107E10 0 MRC p14,#0x0,r7,c0,c0,#0 false 890 Instruction 835 S:0xC001222A 0xEE104E11 0 MRC p14,#0x0,r4,c0,c1,#0 false 1076 Instruction 1015 S:0xC00089C4 0xEE113F50 0 MRC p15,#0x0,r3,c1,c0,#2 false 1236 Instruction 1168 S:0xC0010C80 0xEE1D1F90 0 MRC p15,#0x0,r1,c13,c0,#4 false 1257 Instruction 1189 S:0xC003CF5E 0xEE1D2F90 0 MRC p15,#0x0,r2,c13,c0,#4 false 1523 Instruction 1451 S:0xC003C072 0xEE1D8F90 0 MRC p15,#0x0,r8,c13,c0,#4 false 2787 Instruction 2696 S:0xC0010CBE 0xEE1D2F90 0 MRC p15,#0x0,r2,c13,c0,#4 false 3137 Instruction 3028 S:0xC003C9E0 0xEE1D8F90 0 MRC p15,#0x0,r8,c13,c0,#4 false [all …]
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D | etmv3_0x10.txt | 757 Instruction 708 S:0xC00361E6 0xEE1D1F90 1 MRC p15,#0x0,r1,c13,c0,#4 false 764 Instruction 715 S:0xC00361FC 0xEE1D1F90 1 MRC p15,#0x0,r1,c13,c0,#4 false 781 Instruction 730 S:0xC0036228 0xEE1D3F90 1 MRC p15,#0x0,r3,c13,c0,#4 false 2710 Instruction 2565 S:0xC00176C8 0xEE123F30 1 MRC p15,#0x0,r3,c2,c0,#1 false 3076 Instruction 2909 S:0xC000D5F0 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false 3112 Instruction 2940 S:0xC003590E 0xEE1D3F90 1 MRC p15,#0x0,r3,c13,c0,#4 false 3319 Instruction 3140 S:0xC0055738 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false 3455 Instruction 3273 S:0xC003F604 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false 3478 Instruction 3296 S:0xC003F38C 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false 3502 Instruction 3320 S:0xC0035C4A 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false [all …]
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D | etmv3_0x11.txt | 161 Instruction 153 S:0xC003F604 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false 184 Instruction 176 S:0xC003F38C 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false 208 Instruction 200 S:0xC0035C4A 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false 2024 Instruction 1981 S:0xC0038894 0xEE1D3F90 1 MRC p15,#0x0,r3,c13,c0,#4 false 3006 Instruction 2942 S:0xC004EC38 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false 3233 Instruction 3165 S:0xC0055380 0xEE1D2F90 11 MRC p15,#0x0,r2,c13,c0,#4 false 3498 Instruction 3420 S:0xC0020EE0 0xEE1D2F90 12 MRC p15,#0x0,r2,c13,c0,#4 false 3515 Instruction 3437 S:0xC0025ACE 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false 3522 Instruction 3444 S:0xC0035BA6 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false 3666 Instruction 3584 S:0xC0020EE0 0xEE1D2F90 1 MRC p15,#0x0,r2,c13,c0,#4 false [all …]
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/external/llvm/lib/Target/ARM/InstPrinter/ |
D | ARMInstPrinter.cpp | 242 const MCRegisterClass &MRC = MRI.getRegClass(ARM::GPRRegClassID); in printInst() local 245 if (MRC.contains(Reg)) { in printInst()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMInstPrinter.cpp | 262 const MCRegisterClass &MRC = MRI.getRegClass(ARM::GPRRegClassID); in printInst() local 265 if (MRC.contains(Reg)) { in printInst()
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/external/llvm/lib/Target/ARM/ |
D | ARMFrameLowering.cpp | 2002 AddDefaultPred(BuildMI(McrMBB, DL, TII.get(ARM::MRC), ScratchReg0) in adjustForSegmentedStacks()
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/external/llvm/lib/Target/X86/ |
D | X86InstrAVX512.td | 40 RegisterClass MRC = 603 From.RC:$src1, (iPTR imm:$idx), To.RC:$src0, To.MRC:$mask), 607 (COPY_TO_REGCLASS To.MRC:$mask, To.KRCWM), 613 From.RC:$src1, (iPTR imm:$idx), To.ImmAllZerosV, To.MRC:$mask), 616 (COPY_TO_REGCLASS To.MRC:$mask, To.KRCWM), 6317 addr:$ptr, (SrcInfo.VT SrcInfo.RC:$src), SrcInfo.MRC:$mask), 6319 (COPY_TO_REGCLASS SrcInfo.MRC:$mask, SrcInfo.KRCWM),
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/external/capstone/arch/ARM/ |
D | ARMInstPrinter.c | 772 const MCRegisterClass* MRC = MCRegisterInfo_getRegClass(MRI, ARM_GPRRegClassID); in ARM_printInst() local 776 if (MCRegisterClass_contains(MRC, Reg)) { in ARM_printInst()
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D | ARMGenAsmWriter.inc | 251 201369257U, // MRC 3055 0U, // MRC 6141 // CDP, LDRD_POST, LDRD_PRE, MCR, MRC, STRD_POST, STRD_PRE, VLD4DUPd16, V... 6798 // MRC, t2MRC, t2MRC2 8984 // (MRC GPRwithAPSR:$Rt, p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm, 0, pred:$p)
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMFrameLowering.cpp | 2427 BuildMI(McrMBB, DL, TII.get(Thumb ? ARM::t2MRC : ARM::MRC), in adjustForSegmentedStacks()
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D | ARMScheduleA57.td | 145 "(t2)?MCR(2|R|R2)?$", "(t2)?MRC(2)?$",
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D | ARMInstrInfo.td | 5414 def MRC : MovRCopro<"mrc", 1 /* from coprocessor to ARM core register */, 5419 (MRC GPRwithAPSR:$Rt, p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, 5423 (MRC p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2)>; 5680 def : ARMPat<(ARMthread_pointer), (MRC 15, 0, 13, 0, 3)>,
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/external/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 6035 const MCRegisterClass& MRC = MRI->getRegClass(ARM::GPRRegClassID); in ParseInstruction() local 6037 if (Op1.isReg() && Op2.isReg() && MRC.contains(Op1.getReg()) && in ParseInstruction() 6038 MRC.contains(Op2.getReg())) { in ParseInstruction()
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
D | ARMGenAsmWriter.inc | 1468 1345440820U, // MRC 5692 0U, // MRC 9233 // CDP, LDRD_POST, LDRD_PRE, MCR, MRC, MVE_SQRSHRL, MVE_UQRSHLL, MVE_VMOV... 10011 // MRC, t2MRC, t2MRC2
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