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Searched refs:NCVFlag (Results 1 – 25 of 39) sorted by relevance

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/external/vixl/test/aarch32/
Dtest-simulator-cond-rdlow-rnlow-operand-immediate-t32.cc166 {NCFlag, 0x00000000, 0x00000000}, {NCVFlag, 0x00000000, 0x00000000},
168 {NCFlag, 0xfffffffe, 0xfffffffe}, {NCVFlag, 0x00007ffd, 0x00007ffd},
178 {ZCFlag, 0x00000020, 0x00000020}, {NCVFlag, 0xffff8000, 0xffff8000},
181 {NVFlag, 0x00000001, 0x00000001}, {NCVFlag, 0x33333333, 0x33333333},
183 {NCVFlag, 0x80000000, 0x80000000}, {ZCFlag, 0x00000001, 0x00000001},
187 {NCVFlag, 0x00007ffe, 0x00007ffe}, {NFlag, 0xffffff81, 0xffffff81},
195 {NCVFlag, 0x0000007d, 0x0000007d}, {NCVFlag, 0x0000007f, 0x0000007f},
208 {NZCFlag, 0xffffff80, 0xffffff80}, {NCVFlag, 0xffff8003, 0xffff8003},
235 {NCVFlag, 0x00000020, 0x00000020}, {NZVFlag, 0xffffff82, 0xffffff82},
247 {NFlag, 0x7fffffff, 0x7fffffff}, {NCVFlag, 0xffffff80, 0xffffff80},
[all …]
Dtest-simulator-cond-rd-rn-operand-rm-t32.cc206 {NCVFlag, 0xabababab, 0xabababab, 0xabababab},
215 {NCVFlag, 0x00000001, 0x00000001, 0x00000002},
216 {NCVFlag, 0xffffffff, 0xffffffff, 0x55555555},
221 {NCVFlag, 0xffffffff, 0xffffffff, 0xffffff82},
230 {NCVFlag, 0xffffff83, 0xffffff83, 0xffffffff},
246 {NCVFlag, 0xffffffe0, 0xffffffe0, 0x00000000},
260 {NCVFlag, 0x00000001, 0x00000001, 0x00000020},
267 {NCVFlag, 0x00007ffd, 0x00007ffd, 0xffff8001},
299 {NCVFlag, 0xfffffffd, 0xfffffffd, 0x7ffffffe},
308 {NCVFlag, 0xffff8002, 0xffff8002, 0x00007ffd},
[all …]
Dtest-utils-aarch32.h75 const uint32_t NCVFlag = NFlag | CFlag | VFlag; variable
Dtest-simulator-cond-rd-operand-const-a32.cc176 {NCVFlag, 0xabababab},
Dtest-simulator-cond-rd-operand-imm16-t32.cc170 {NCVFlag, 0xabababab},
Dtest-simulator-cond-rd-operand-const-t32.cc176 {NCVFlag, 0xabababab},
Dtest-simulator-cond-rd-operand-rn-a32.cc183 {NCVFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-operand-rn-ror-amount-a32.cc177 {NCVFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-operand-rn-t32.cc183 {NCVFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-operand-rn-ror-amount-t32.cc177 {NCVFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rdlow-rnlow-rmlow-t32.cc174 {NCVFlag, 0xabababab, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-operand-rn-shift-amount-1to31-t32.cc179 {NCVFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-operand-rn-shift-amount-1to32-a32.cc179 {NCVFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc179 {NCVFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-operand-rn-shift-amount-1to31-a32.cc179 {NCVFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-rn-operand-rm-a32.cc206 {NCVFlag, 0xabababab, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-rn-operand-rm-ror-amount-t32.cc180 {NCVFlag, 0xabababab, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-rn-operand-rm-ror-amount-a32.cc180 {NCVFlag, 0xabababab, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-rn-t32.cc176 {NCVFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-rn-a32.cc176 {NCVFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rdlow-operand-imm8-t32.cc171 {NCVFlag, 0xabababab},
Dtest-simulator-cond-rd-rn-operand-const-a32.cc190 {NCVFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc194 {NCVFlag, 0xabababab, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc194 {NCVFlag, 0xabababab, 0xabababab, 0xabababab},
/external/vixl/benchmarks/aarch64/
Dbench-utils.cc370 __ Fccmp(PickV(size), PickV(size), NCVFlag, pl); in GenerateFPSequence()

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