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Searched refs:OPERAND_REG_INLINE_C_INT32 (Results 1 – 7 of 7) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIDefines.h138 OPERAND_REG_INLINE_C_INT32, enumerator
DSIFoldOperands.cpp667 TII->isInlineConstant(OpToFold, AMDGPU::OPERAND_REG_INLINE_C_INT32)) { in foldOperand()
710 getRegSeqInit(Defs, UseReg, AMDGPU::OPERAND_REG_INLINE_C_INT32, TII, in foldOperand()
726 TII->isInlineConstant(*Def, AMDGPU::OPERAND_REG_INLINE_C_INT32)) { in foldOperand()
DSIInstrInfo.cpp2855 case AMDGPU::OPERAND_REG_INLINE_C_INT32: in isInlineConstant()
3262 case AMDGPU::OPERAND_REG_INLINE_C_INT32: in verifyInstruction()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/
DSIMCCodeEmitter.cpp239 case AMDGPU::OPERAND_REG_INLINE_C_INT32: in getLitEncoding()
DAMDGPUInstPrinter.cpp524 case AMDGPU::OPERAND_REG_INLINE_C_INT32: in printOperand()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Utils/
DAMDGPUBaseInfo.h600 case AMDGPU::OPERAND_REG_INLINE_C_INT32: in getOperandSize()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/
DAMDGPUAsmParser.cpp1473 case AMDGPU::OPERAND_REG_INLINE_C_INT32: in getOpFltSemantics()
1747 case AMDGPU::OPERAND_REG_INLINE_C_INT32: in addLiteralImmOperand()
1787 case AMDGPU::OPERAND_REG_INLINE_C_INT32: in addLiteralImmOperand()