| /external/libxaac/decoder/ |
| D | ixheaacd_constants.h | 47 #define Q28 268435456 macro
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 143 case AArch64::Q28: in isOdd()
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| D | AArch64RegisterInfo.td | 383 def Q28 : AArch64Reg<28, "q28", [D28], ["v28", ""]>, DwarfRegAlias<B28>;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 142 case AArch64::Q28: in isOdd()
|
| D | AArch64SchedPredicates.td | 198 CheckRegOperand<0, Q28>,
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| D | AArch64RegisterInfo.td | 416 def Q28 : AArch64Reg<28, "q28", [D28], ["v28", ""]>, DwarfRegAlias<B28>;
777 def Z28 : AArch64Reg<28, "z28", [Q28, Z28_HI]>, DwarfRegNum<[124]>;
|
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 1255 case AArch64::Q27: Reg = AArch64::Q28; break; in getNextVectorRegister()
1256 case AArch64::Q28: Reg = AArch64::Q29; break; in getNextVectorRegister()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64MCTargetDesc.cpp | 223 {codeview::RegisterId::ARM64_Q28, AArch64::Q28}, in initLLVMToCVRegMapping()
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| D | AArch64InstPrinter.cpp | 1192 case AArch64::Q27: Reg = AArch64::Q28; break; in getNextVectorRegister()
1193 case AArch64::Q28: Reg = AArch64::Q29; break; in getNextVectorRegister()
|
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 261 AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29,
441 AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29,
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 310 AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29,
634 AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29,
|
| /external/perfetto/infra/perfetto.dev/src/assets/ |
| D | style.scss | 197 …25 9.05 0 2.15-.7 4.15-.7 2-2.1 3.75L42 39.75Zm-20.95-13.4q4.05 0 6.9-2.875Q28.6 22.8 28.6 18.75t-…
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenRegisterInfo.inc | 169 Q28 = 149,
2660 …h64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArc…
3930 { AArch64::Q28, 92U },
4209 { AArch64::Q28, 92U },
20422 …h64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArc…
20424 …h64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArc…
20446 …h64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArc…
20448 …h64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArc…
20450 …h64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArc…
|
| D | AArch64GenSubtargetInfo.inc | 14043 || MI->getOperand(0).getReg() == AArch64::Q28
14197 || MI->getOperand(0).getReg() == AArch64::Q28
14351 || MI->getOperand(0).getReg() == AArch64::Q28
14562 || MI->getOperand(0).getReg() == AArch64::Q28
14603 || MI->getOperand(0).getReg() == AArch64::Q28
16572 || MI->getOperand(0).getReg() == AArch64::Q28
16613 || MI->getOperand(0).getReg() == AArch64::Q28
19679 || MI->getOperand(0).getReg() == AArch64::Q28
19833 || MI->getOperand(0).getReg() == AArch64::Q28
19987 || MI->getOperand(0).getReg() == AArch64::Q28
[all …]
|
| D | AArch64GenAsmMatcher.inc | 11453 case AArch64::Q28: OpKind = MCK_FPR128; break;
|
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 1885 .Case("v28", AArch64::Q28) in matchVectorRegName()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 2118 .Case("v28", AArch64::Q28) in MatchNeonVectorRegName()
|
| /external/ComputeLibrary/data/images/ |
| D | 1920x1080.ppm | 5298 … ��?��N:�J-�=�5�4�>�A �<�A�C �K"�_3�Y.�iB�[7�N/�B'j L/���1 (Q28\ �0&�-#�% �#�% �#…
|