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Searched refs:RADEON_SURF_MODE_2D (Results 1 – 20 of 20) sorted by relevance

/external/libdrm/radeon/
Dradeon_surface.c179 if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D && in surf_minify()
390 surf->level[i].mode = RADEON_SURF_MODE_2D; in r6_surface_init_2d()
413 surf->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE); in r6_surface_init()
423 case RADEON_SURF_MODE_2D: in r6_surface_init()
465 case RADEON_SURF_MODE_2D: in r6_surface_init()
588 if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D && in eg_surf_minify()
691 level[i].mode = RADEON_SURF_MODE_2D; in eg_surface_init_2d()
733 if (mode == RADEON_SURF_MODE_2D) { in eg_surface_sanity()
842 surf->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE); in eg_surface_init()
852 case RADEON_SURF_MODE_2D: in eg_surface_init()
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Dradeon_surface.h53 #define RADEON_SURF_MODE_2D 3 macro
/external/mesa3d/src/amd/common/
Dac_surface.h50 RADEON_SURF_MODE_2D = 3, enumerator
Dac_surface.c552 surf_level->mode = RADEON_SURF_MODE_2D; in gfx6_compute_level()
645 if (!is_stencil && AddrSurfInfoIn->flags.depth && surf_level->mode == RADEON_SURF_MODE_2D && in gfx6_compute_level()
745 surf->u.legacy.level[0].mode == RADEON_SURF_MODE_2D && in gfx6_surface_settings()
866 mode = RADEON_SURF_MODE_2D; in gfx6_compute_surface()
880 case RADEON_SURF_MODE_2D: in gfx6_compute_surface()
1920 case RADEON_SURF_MODE_2D: in gfx9_compute_surface()
2235 surf->u.gfx9.surf.swizzle_mode > 0 ? RADEON_SURF_MODE_2D : RADEON_SURF_MODE_LINEAR_ALIGNED; in ac_surface_set_bo_metadata()
2246 *mode = RADEON_SURF_MODE_2D; in ac_surface_set_bo_metadata()
2283 if (surf->u.legacy.level[0].mode >= RADEON_SURF_MODE_2D) in ac_surface_get_bo_metadata()
/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_surface.c399 RADEON_SURF_MODE_2D, &fmask)) { in radeon_winsys_surface_init()
404 assert(fmask.u.legacy.level[0].mode == RADEON_SURF_MODE_2D); in radeon_winsys_surface_init()
Dradeon_drm_bo.c895 md->mode = RADEON_SURF_MODE_2D; in radeon_bo_get_metadata()
948 if (surf->u.legacy.level[0].mode >= RADEON_SURF_MODE_2D) in radeon_bo_set_metadata()
/external/mesa3d/src/amd/vulkan/
Dradv_image.c64 return RADEON_SURF_MODE_2D; in radv_choose_tiling()
66 return RADEON_SURF_MODE_2D; in radv_choose_tiling()
327 surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE); in radv_patch_surface_from_metadata()
341 surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE); in radv_patch_surface_from_metadata()
650 base_level_info->mode == RADEON_SURF_MODE_2D) in si_set_mutable_tex_desc_fields()
1235 metadata->u.legacy.macrotile = surface->u.legacy.level[0].mode >= RADEON_SURF_MODE_2D ? in radv_init_metadata()
Dradv_device.c6768 if (level_info->mode == RADEON_SURF_MODE_2D) in radv_initialise_color_surface()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_texture.c281 metadata->u.legacy.macrotile = surface->u.legacy.level[0].mode >= RADEON_SURF_MODE_2D ? in r600_texture_init_metadata()
307 *array_mode = RADEON_SURF_MODE_2D; in r600_surface_import_metadata()
641 flags, bpe, RADEON_SURF_MODE_2D, &fmask)) { in r600_texture_get_fmask_info()
646 assert(fmask.u.legacy.level[0].mode == RADEON_SURF_MODE_2D); in r600_texture_get_fmask_info()
1043 return RADEON_SURF_MODE_2D; in r600_choose_tiling()
1089 return RADEON_SURF_MODE_2D; in r600_choose_tiling()
Dr600_test_dma.c150 case RADEON_SURF_MODE_2D: in array_mode_to_string()
Dr600_state.c744 case RADEON_SURF_MODE_2D: in r600_create_sampler_view_custom()
845 case RADEON_SURF_MODE_2D: in r600_init_color_surface()
1051 case RADEON_SURF_MODE_2D: in r600_init_depth_surface()
2838 case RADEON_SURF_MODE_2D: return V_0280A0_ARRAY_2D_TILED_THIN1; in r600_array_mode()
Dradeon_uvd.c1219 case RADEON_SURF_MODE_2D: in ruvd_set_dt_surfaces()
Devergreen_state.c44 case RADEON_SURF_MODE_2D: return V_028C70_ARRAY_2D_TILED_THIN1; in evergreen_array_mode()
802 case RADEON_SURF_MODE_2D: in evergreen_fill_tex_resource_words()
1152 case RADEON_SURF_MODE_2D: in evergreen_set_color_surface_common()
1367 case RADEON_SURF_MODE_2D: in evergreen_init_depth_surface()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dcik_sdma.c220 unsigned dst_tile_swizzle = dst_mode == RADEON_SURF_MODE_2D ? sdst->surface.tile_swizzle : 0; in cik_sdma_copy_texture()
221 unsigned src_tile_swizzle = src_mode == RADEON_SURF_MODE_2D ? ssrc->surface.tile_swizzle : 0; in cik_sdma_copy_texture()
Dsi_test_dma.c145 case RADEON_SURF_MODE_2D: in array_mode_to_string()
Dsi_texture.c244 (sscreen->info.chip_class >= GFX9 || array_mode == RADEON_SURF_MODE_2D)) { in si_init_surface()
1238 return RADEON_SURF_MODE_2D; in si_choose_tiling()
1248 return RADEON_SURF_MODE_2D; in si_choose_tiling()
1286 return RADEON_SURF_MODE_2D; in si_choose_tiling()
Dsi_clear.c278 tex->surface.u.legacy.level[0].mode == RADEON_SURF_MODE_2D); in si_set_optimal_micro_tile_mode()
Dsi_descriptors.c330 if (sscreen->info.chip_class >= GFX9 || base_level_info->mode == RADEON_SURF_MODE_2D) in si_set_mutable_tex_desc_fields()
342 assert(base_level_info->mode == RADEON_SURF_MODE_2D); in si_set_mutable_tex_desc_fields()
Dsi_state.c3049 if (level_info->mode == RADEON_SURF_MODE_2D) in si_emit_framebuffer_state()
/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_uvd.c1453 case RADEON_SURF_MODE_2D: in si_uvd_set_dt_surfaces()