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Searched refs:RCP_HI (Results 1 – 4 of 4) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUCodeGenPrepare.cpp804 Value *RCP_LO, *RCP_HI; in expandDivRem32() local
805 std::tie(RCP_LO, RCP_HI) = getMul64(Builder, RCP, Den); in expandDivRem32()
811 Value *RCP_HI_0_CC = Builder.CreateICmpEQ(RCP_HI, Zero); in expandDivRem32()
DAMDGPUISelLowering.cpp1875 SDValue RCP_HI = DAG.getNode(ISD::MULHU, DL, VT, RCP, Den); in LowerUDIVREM() local
1882 SDValue ABS_RCP_LO = DAG.getSelectCC(DL, RCP_HI, DAG.getConstant(0, DL, VT), in LowerUDIVREM()
1896 SDValue Tmp0 = DAG.getSelectCC(DL, RCP_HI, DAG.getConstant(0, DL, VT), in LowerUDIVREM()
/external/llvm/test/CodeGen/AMDGPU/
Dudivrem.ll31 ; SI-DAG: v_mul_hi_u32 [[RCP_HI:v[0-9]+]], [[RCP]]
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp1439 SDValue RCP_HI = DAG.getNode(ISD::MULHU, DL, VT, RCP, Den); in LowerUDIVREM() local
1446 SDValue ABS_RCP_LO = DAG.getSelectCC(DL, RCP_HI, DAG.getConstant(0, DL, VT), in LowerUDIVREM()
1460 SDValue Tmp0 = DAG.getSelectCC(DL, RCP_HI, DAG.getConstant(0, DL, VT), in LowerUDIVREM()