Searched refs:REGISTER_LOAD (Results 1 – 8 of 8) sorted by relevance
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600InstrInfo.h | 28 REGISTER_LOAD = UINT64_C(1) << 63 enumerator
322 return get(MI.getOpcode()).TSFlags & R600InstrFlags::REGISTER_LOAD; in isRegisterLoad()
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| D | AMDGPUISelLowering.h | 440 REGISTER_LOAD, enumerator
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| D | AMDGPUInstrInfo.td | 254 def AMDGPUregister_load : SDNode<"AMDGPUISD::REGISTER_LOAD",
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| D | AMDGPUISelLowering.cpp | 4305 NODE_NAME_CASE(REGISTER_LOAD) in getTargetNodeName()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.h | 276 REGISTER_LOAD, enumerator
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| D | AMDGPUInstrInfo.td | 172 def AMDGPUregister_load : SDNode<"AMDGPUISD::REGISTER_LOAD",
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| D | R600ISelLowering.cpp | 1323 SDValue Dst = DAG.getNode(AMDGPUISD::REGISTER_LOAD, DL, MVT::i32, in lowerPrivateTruncStore()
1523 SDValue Ret = DAG.getNode(AMDGPUISD::REGISTER_LOAD, DL, Op.getValueType(), in lowerPrivateExtLoad()
1687 Loads[i] = DAG.getNode(AMDGPUISD::REGISTER_LOAD, DL, ElemVT, in LowerLOAD()
1695 LoweredLoad = DAG.getNode(AMDGPUISD::REGISTER_LOAD, DL, VT, in LowerLOAD()
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| D | AMDGPUISelLowering.cpp | 2847 NODE_NAME_CASE(REGISTER_LOAD) in getTargetNodeName()
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