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Searched refs:RSrc (Results 1 – 7 of 7) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ExecutionEngine/Orc/
DOrcRemoteTargetServer.h352 Expected<std::vector<uint8_t>> handleReadMem(JITTargetAddress RSrc, in handleReadMem() argument
354 uint8_t *Src = reinterpret_cast<uint8_t *>(static_cast<uintptr_t>(RSrc)); in handleReadMem()
357 << format("0x%016x", RSrc) << "\n"); in handleReadMem()
/external/llvm/include/llvm/ExecutionEngine/Orc/
DOrcRemoteTargetServer.h365 Expected<std::vector<char>> handleReadMem(TargetAddress RSrc, uint64_t Size) { in handleReadMem() argument
366 char *Src = reinterpret_cast<char *>(static_cast<uintptr_t>(RSrc)); in handleReadMem()
369 << format("0x%016x", RSrc) << "\n"); in handleReadMem()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPURegisterBankInfo.cpp1379 Register RSrc = MI.getOperand(2).getReg(); in selectStoreIntrinsic() local
1418 MIB.addUse(RSrc) in selectStoreIntrinsic()
2959 Register RSrc = MI.getOperand(2).getReg(); // SGPR in getInstrMapping() local
2963 unsigned Size2 = MRI.getType(RSrc).getSizeInBits(); in getInstrMapping()
2966 unsigned RSrcBank = getRegBankID(RSrc, MRI, *TRI); in getInstrMapping()
3141 Register RSrc = MI.getOperand(2).getReg(); // SGPR in getInstrMapping() local
3146 unsigned Size2 = MRI.getType(RSrc).getSizeInBits(); in getInstrMapping()
3150 unsigned RSrcBank = getRegBankID(RSrc, MRI, *TRI); in getInstrMapping()
DAMDGPUInstructionSelector.cpp986 Register RSrc = MI.getOperand(2).getReg(); in selectStoreIntrinsic() local
1010 MIB.addUse(RSrc) in selectStoreIntrinsic()
DAMDGPUISelDAGToDAG.cpp220 SDValue Addr, SDValue &RSrc, SDValue &VAddr,
DSIInstrInfo.cpp334 const MachineOperand *RSrc = getNamedOperand(LdSt, AMDGPU::OpName::srsrc); in getMemOperandWithOffset() local
337 if (RSrc->getReg() != MFI->getScratchRSrcReg()) in getMemOperandWithOffset()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelDAGToDAG.cpp102 bool SelectMUBUFScratch(SDValue Addr, SDValue &RSrc, SDValue &VAddr,