/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | GCNSchedStrategy.cpp | 327 Regions.push_back(std::make_pair(RegionBegin, RegionEnd)); in schedule() 350 Regions[RegionIdx] = std::make_pair(RegionBegin, RegionEnd); in schedule() 406 RegionEnd = RegionBegin; in schedule() 437 RegionBegin = Unsched.front()->getIterator(); in schedule() 438 Regions[RegionIdx] = std::make_pair(RegionBegin, RegionEnd); in schedule() 562 RegionBegin = Region.first; in finalizeSchedule() 565 if (RegionBegin->getParent() != MBB) { in finalizeSchedule() 567 MBB = RegionBegin->getParent(); in finalizeSchedule()
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D | GCNIterativeScheduler.cpp | 202 assert(Sch.RegionBegin == Rgn.Begin && Sch.RegionEnd == Rgn.End); in schedule() 210 Rgn.Begin = Sch.RegionBegin; in schedule() 215 assert(Sch.RegionBegin == Rgn.Begin && Sch.RegionEnd == Rgn.End); in restoreOrder() 314 LLVM_DEBUG(printLivenessInfo(dbgs(), RegionBegin, RegionEnd, LIS); in schedule() 315 if (!Regions.empty() && Regions.back()->Begin == RegionBegin) { in schedule() 374 assert(RegionBegin == R.Begin && RegionEnd == R.End); in scheduleRegion() 404 RegionBegin = getMachineInstr(Schedule.front()); in scheduleRegion() 415 R.Begin = RegionBegin; in scheduleRegion()
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D | SIMachineScheduler.h | 451 RPTracker.init(&MF, RegClassInfo, LIS, BB, RegionBegin, false, false); in initRPTracker()
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D | SIMachineScheduler.cpp | 2020 assert(TopRPTracker.getPos() == RegionBegin && "bad initial Top tracker"); in schedule()
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/external/llvm/include/llvm/CodeGen/ |
D | ScheduleDAGInstrs.h | 129 MachineBasicBlock::iterator RegionBegin; variable 253 MachineBasicBlock::iterator begin() const { return RegionBegin; } in begin()
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | ScheduleDAGInstrs.h | 148 MachineBasicBlock::iterator RegionBegin; variable 272 MachineBasicBlock::iterator begin() const { return RegionBegin; } in begin()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | PostRASchedulerList.cpp | 397 AntiDepBreak->BreakAntiDependencies(SUnits, RegionBegin, RegionEnd, in schedule() 673 RegionBegin = RegionEnd; in EmitSchedule() 690 RegionBegin = std::prev(RegionEnd); in EmitSchedule()
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D | MachineScheduler.cpp | 457 MachineBasicBlock::iterator RegionBegin; member 463 RegionBegin(B), RegionEnd(E), NumRegionInstrs(N) {} in SchedRegion() 549 MachineBasicBlock::iterator I = R->RegionBegin; in scheduleRegions() 719 if (&*RegionBegin == MI) in moveInstruction() 720 ++RegionBegin; in moveInstruction() 730 if (RegionBegin == InsertPos) in moveInstruction() 731 RegionBegin = MI; in moveInstruction() 873 CurrentTop = nextIfDebug(RegionBegin, RegionEnd); in initQueues() 892 BB->splice(RegionBegin, BB, FirstDbgValue); in placeDebugValues() 893 RegionBegin = FirstDbgValue; in placeDebugValues() [all …]
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D | ScheduleDAGInstrs.cpp | 191 RegionBegin = begin; in enterRegion() 570 for (MachineInstr &MI : make_range(RegionBegin, RegionEnd)) { in initSUnits() 798 for (MachineBasicBlock::iterator MII = RegionEnd, MIE = RegionBegin; in buildSchedGraph()
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/external/llvm/lib/CodeGen/ |
D | PostRASchedulerList.cpp | 397 AntiDepBreak->BreakAntiDependencies(SUnits, RegionBegin, RegionEnd, in schedule() 675 RegionBegin = RegionEnd; in EmitSchedule() 692 RegionBegin = std::prev(RegionEnd); in EmitSchedule()
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D | MachineScheduler.cpp | 647 if (&*RegionBegin == MI) in moveInstruction() 648 ++RegionBegin; in moveInstruction() 658 if (RegionBegin == InsertPos) in moveInstruction() 659 RegionBegin = MI; in moveInstruction() 807 CurrentTop = nextIfDebug(RegionBegin, RegionEnd); in initQueues() 826 BB->splice(RegionBegin, BB, FirstDbgValue); in placeDebugValues() 827 RegionBegin = FirstDbgValue; in placeDebugValues() 835 if (&*RegionBegin == DbgValue) in placeDebugValues() 836 ++RegionBegin; in placeDebugValues() 892 TopRPTracker.init(&MF, RegClassInfo, LIS, BB, RegionBegin, in initRegPressure() [all …]
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D | ScheduleDAGInstrs.cpp | 230 RegionBegin = begin; in enterRegion() 648 for (MachineInstr &MI : llvm::make_range(RegionBegin, RegionEnd)) { in initSUnits() 913 for (MachineBasicBlock::iterator MII = RegionEnd, MIE = RegionBegin; in buildSchedGraph()
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/external/scudo/standalone/ |
D | primary64.h | 406 B.RegionBegin = RegionInfoArray[ClassId].RegionBeg; in findNearestBlock() 407 B.RegionEnd = B.RegionBegin + RegionInfoArray[ClassId].AllocatedUser; in findNearestBlock() 410 B.RegionBegin + uptr(sptr(Ptr - B.RegionBegin) / sptr(B.BlockSize) * in findNearestBlock() 412 while (B.BlockBegin < B.RegionBegin) in findNearestBlock()
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D | common.h | 204 uptr RegionBegin; member
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D | combined.h | 1388 if (BlockAddr < Info.RegionBegin || BlockAddr >= Info.RegionEnd) in getInlineErrorInfo()
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/external/llvm/lib/Target/AMDGPU/ |
D | SIMachineScheduler.h | 444 RPTracker.init(&MF, RegClassInfo, LIS, BB, RegionBegin, false, false); in initRPTracker()
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D | SIMachineScheduler.cpp | 1880 assert(TopRPTracker.getPos() == RegionBegin && "bad initial Top tracker"); in schedule()
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