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Searched refs:ReplaceReg (Results 1 – 4 of 4) sorted by relevance

/external/mesa3d/src/gallium/drivers/r300/compiler/
Dradeon_compiler_util.c370 const struct rc_src_register * ReplaceReg; member
399 if (!d->ReplaceRemoved && src == d->ReplaceReg) { in can_use_presub_read_cb()
445 d.ReplaceReg = replace_reg; in rc_inst_can_use_presub()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DModuloSchedule.cpp1163 unsigned ReplaceReg = 0; in rewriteScheduledInstr() local
1168 ReplaceReg = PrevReg; in rewriteScheduledInstr()
1171 ReplaceReg = PrevReg; in rewriteScheduledInstr()
1173 ReplaceReg = NewReg; in rewriteScheduledInstr()
1178 ReplaceReg = NewReg; in rewriteScheduledInstr()
1180 ReplaceReg = NewReg; in rewriteScheduledInstr()
1182 ReplaceReg = NewReg; in rewriteScheduledInstr()
1183 if (ReplaceReg) { in rewriteScheduledInstr()
1184 MRI.constrainRegClass(ReplaceReg, MRI.getRegClass(OldReg)); in rewriteScheduledInstr()
1185 UseOp.setReg(ReplaceReg); in rewriteScheduledInstr()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUMachineCFGStructurizer.cpp1116 unsigned *ReplaceReg);
1120 SmallVector<unsigned, 2> &PHIIndices, unsigned *ReplaceReg);
1449 unsigned *ReplaceReg) { in shrinkPHI() argument
1450 return shrinkPHI(PHI, 0, nullptr, PHIIndices, ReplaceReg); in shrinkPHI()
1457 unsigned *ReplaceReg) { in shrinkPHI() argument
1479 *ReplaceReg = getPHISourceReg(PHI, SingleExternalEntryIndex); in shrinkPHI()
2445 unsigned ReplaceReg; in splitLoopPHI() local
2447 if (shrinkPHI(PHI, PHIRegionIndices, &ReplaceReg)) { in splitLoopPHI()
2448 PHISource = ReplaceReg; in splitLoopPHI()
/external/llvm/lib/CodeGen/
DMachinePipeliner.cpp3273 unsigned ReplaceReg = 0; in rewriteScheduledInstr() local
3278 ReplaceReg = PrevReg; in rewriteScheduledInstr()
3281 ReplaceReg = PrevReg; in rewriteScheduledInstr()
3283 ReplaceReg = NewReg; in rewriteScheduledInstr()
3289 ReplaceReg = NewReg; in rewriteScheduledInstr()
3291 ReplaceReg = NewReg; in rewriteScheduledInstr()
3293 ReplaceReg = NewReg; in rewriteScheduledInstr()
3294 if (ReplaceReg) { in rewriteScheduledInstr()
3295 MRI.constrainRegClass(ReplaceReg, MRI.getRegClass(OldReg)); in rewriteScheduledInstr()
3296 UseOp.setReg(ReplaceReg); in rewriteScheduledInstr()