| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 116 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in BPFTargetLowering()
118 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in BPFTargetLowering()
119 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand); in BPFTargetLowering()
120 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand); in BPFTargetLowering()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 126 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in BPFTargetLowering()
128 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in BPFTargetLowering()
129 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand); in BPFTargetLowering()
130 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand); in BPFTargetLowering()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 829 SEXTLOAD, enumerator
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1025 SEXTLOAD, enumerator
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 79 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in R600TargetLowering()
80 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Custom); in R600TargetLowering()
81 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Custom); in R600TargetLowering()
94 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i32, MVT::v2i1, Expand); in R600TargetLowering()
98 setLoadExtAction(ISD::SEXTLOAD, MVT::v4i32, MVT::v4i1, Expand); in R600TargetLowering()
1425 if (ExtType == ISD::SEXTLOAD) { // ... ones. in lowerPrivateExtLoad()
1503 if (LoadNode->getExtensionType() == ISD::SEXTLOAD) { in LowerLOAD()
1624 Ext = ISD::SEXTLOAD; in LowerFormalArguments()
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| D | AMDGPUISelLowering.cpp | 110 setLoadExtAction(ISD::SEXTLOAD, MVT::i64, VT, Expand); in AMDGPUTargetLowering()
118 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in AMDGPUTargetLowering()
119 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Legal); in AMDGPUTargetLowering()
120 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Legal); in AMDGPUTargetLowering()
121 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand); in AMDGPUTargetLowering()
136 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Expand); in AMDGPUTargetLowering()
139 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i8, Expand); in AMDGPUTargetLowering()
142 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i16, Expand); in AMDGPUTargetLowering()
145 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v3i16, Expand); in AMDGPUTargetLowering()
148 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i16, Expand); in AMDGPUTargetLowering()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 53 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in R600TargetLowering()
54 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Custom); in R600TargetLowering()
55 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Custom); in R600TargetLowering()
68 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i32, MVT::v2i1, Expand); in R600TargetLowering()
72 setLoadExtAction(ISD::SEXTLOAD, MVT::v4i32, MVT::v4i1, Expand); in R600TargetLowering()
1545 if (ExtType == ISD::SEXTLOAD) { in lowerPrivateExtLoad()
1646 if (LoadNode->getExtensionType() == ISD::SEXTLOAD) { in LowerLOAD()
1785 Ext = ISD::SEXTLOAD; in LowerFormalArguments()
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| D | AMDGPUISelLowering.cpp | 102 setLoadExtAction(ISD::SEXTLOAD, MVT::i64, VT, Expand); in AMDGPUTargetLowering()
110 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in AMDGPUTargetLowering()
111 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Legal); in AMDGPUTargetLowering()
112 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Legal); in AMDGPUTargetLowering()
113 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand); in AMDGPUTargetLowering()
128 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Expand); in AMDGPUTargetLowering()
131 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i8, Expand); in AMDGPUTargetLowering()
134 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i16, Expand); in AMDGPUTargetLowering()
137 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i16, Expand); in AMDGPUTargetLowering()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAG.cpp | 311 if (ExtType == ISD::SEXTLOAD) in SelectIndexedLoad()
491 IntExt = ISD::SEXTLOAD; in tryLoadOfLoadIntrinsic()
672 LD->getExtensionType() != ISD::SEXTLOAD || in SelectMul()
701 LD->getExtensionType() != ISD::SEXTLOAD || in SelectMul()
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| D | HexagonOperands.td | 603 return LD->getExtensionType() == ISD::SEXTLOAD &&
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 662 case ISD::SEXTLOAD: OS << ", sext"; break; in print_details()
694 case ISD::SEXTLOAD: OS << ", sext"; break; in print_details()
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| D | DAGCombiner.cpp | 8937 auto LoadExtOpcode = IsSigned ? ISD::SEXTLOAD : ISD::ZEXTLOAD; in visitVSELECT()
9286 N->getOpcode() == ISD::SIGN_EXTEND ? ISD::SEXTLOAD : ISD::ZEXTLOAD; in CombineExtLoad()
9372 Load->getExtensionType() == ISD::SEXTLOAD || Load->isIndexed()) in CombineZExtLogicopShiftLoad()
9472 bool isAExtLoad = (ExtLoadType == ISD::SEXTLOAD) ? ISD::isSEXTLoad(N0Node) in tryToFoldExtOfExtload()
9668 ISD::SEXTLOAD, ISD::SIGN_EXTEND)) in visitSIGN_EXTEND()
9672 tryToFoldExtOfMaskedLoad(DAG, TLI, VT, N, N0, ISD::SEXTLOAD, in visitSIGN_EXTEND()
9683 DAG, *this, TLI, VT, LegalOperations, N, N0, ISD::SEXTLOAD)) in visitSIGN_EXTEND()
9695 if (TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, MemVT) && in visitSIGN_EXTEND()
9701 SDValue ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, SDLoc(LN00), VT, in visitSIGN_EXTEND()
10009 LN00->getExtensionType() != ISD::SEXTLOAD && LN00->isUnindexed()) { in visitZERO_EXTEND()
[all …]
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 82 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()
84 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in MSP430TargetLowering()
85 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand); in MSP430TargetLowering()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 67 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()
69 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in MSP430TargetLowering()
70 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand); in MSP430TargetLowering()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 248 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) in WebAssemblyTargetLowering()
256 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) in WebAssemblyTargetLowering()
263 for (auto Ext : {ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}) { in WebAssemblyTargetLowering()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 503 case ISD::SEXTLOAD: OS << ", sext"; break; in print_details()
|
| D | DAGCombiner.cpp | 3240 if (LN0->getExtensionType() != ISD::SEXTLOAD && in visitAND()
5960 N->getOpcode() == ISD::SIGN_EXTEND ? ISD::SEXTLOAD : ISD::ZEXTLOAD; in CombineExtLoad()
6084 TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, N0.getValueType()))) { in visitSIGN_EXTEND()
6093 SDValue ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, SDLoc(N), VT, in visitSIGN_EXTEND()
6119 TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, MemVT)) { in visitSIGN_EXTEND()
6120 SDValue ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, SDLoc(N), VT, in visitSIGN_EXTEND()
6139 TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, N0.getValueType()) && in visitSIGN_EXTEND()
6149 SDValue ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, SDLoc(LN0), VT, in visitSIGN_EXTEND()
6434 if (LN0->getExtensionType() != ISD::SEXTLOAD && LN0->isUnindexed()) { in visitZERO_EXTEND()
6783 ExtType = ISD::SEXTLOAD; in ReduceLoadWidth()
[all …]
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| D | LegalizeVectorOps.cpp | 610 case ISD::SEXTLOAD: in ExpandLoad()
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 133 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) in WebAssemblyTargetLowering()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAG.cpp | 139 if (ExtType == ISD::SEXTLOAD) in SelectIndexedLoad()
293 IntExt = ISD::SEXTLOAD; in tryLoadOfLoadIntrinsic()
1469 if (L->getExtensionType() != ISD::SEXTLOAD) in DetectUseSxtw()
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| D | HexagonISelLowering.cpp | 1446 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand); in HexagonTargetLowering()
1506 setLoadExtAction(ISD::SEXTLOAD, TargetVT, VT, Expand); in HexagonTargetLowering()
1525 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i16, MVT::v2i8, Legal); in HexagonTargetLowering()
1528 setLoadExtAction(ISD::SEXTLOAD, MVT::v4i16, MVT::v4i8, Legal); in HexagonTargetLowering()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1548 Opcode = (LD->getExtensionType() == ISD::SEXTLOAD) in tryARMIndexedLoad()
1552 if (LD->getExtensionType() == ISD::SEXTLOAD) { in tryARMIndexedLoad()
1634 bool isSExtLd = LD->getExtensionType() == ISD::SEXTLOAD; in tryT2IndexedLoad()
1699 isSExtLd = LD->getExtensionType() == ISD::SEXTLOAD; in tryMVEIndexedLoad()
1715 isSExtLd = LD->getExtensionType() == ISD::SEXTLOAD; in tryMVEIndexedLoad()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 230 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in NVPTXTargetLowering()
2187 ISD::SEXTLOAD : ISD::ZEXTLOAD; in LowerFormalArguments()
2313 ISD::SEXTLOAD : ISD::ZEXTLOAD; in LowerFormalArguments()
4019 if (ExtType == ISD::SEXTLOAD) { in PerformANDCombine()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelDAGToDAG.cpp | 900 if (PlainLoad && (PlainLoad->getExtensionType() == ISD::SEXTLOAD)) in tryLoad()
1039 if (ExtensionType == ISD::SEXTLOAD) in tryLoadVector()
1682 bool IsSigned = LdNode->getExtensionType() == ISD::SEXTLOAD; in tryLDGLDU()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 142 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in X86TargetLowering()
695 setLoadExtAction(ISD::SEXTLOAD, InnerVT, VT, Expand); in X86TargetLowering()
794 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i8, Custom); in X86TargetLowering()
795 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i16, Custom); in X86TargetLowering()
796 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v8i8, Custom); in X86TargetLowering()
907 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Custom); in X86TargetLowering()
908 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i16, Custom); in X86TargetLowering()
909 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i32, Custom); in X86TargetLowering()
913 setLoadExtAction(ISD::SEXTLOAD, MVT::v8i16, MVT::v8i8, Legal); in X86TargetLowering()
914 setLoadExtAction(ISD::SEXTLOAD, MVT::v4i32, MVT::v4i8, Legal); in X86TargetLowering()
[all …]
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