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Searched refs:SPSR_svc (Results 1 – 5 of 5) sorted by relevance

/external/llvm/test/MC/ARM/
Dmove-banked-regs.s66 @ CHECK-ARM: mrs r5, SPSR_svc @ encoding: [0x00,0x53,0x42,0xe1]
69 @ CHECK-THUMB: mrs r5, SPSR_svc @ encoding: [0xf2,0xf3,0x30,0x85]
176 @ CHECK-ARM: msr SPSR_svc, r5 @ encoding: [0x05,0xf3,0x62,0xe1]
179 @ CHECK-THUMB: msr SPSR_svc, r5 @ encoding: [0x95,0xf3,0x30,0x82]
/external/llvm/test/MC/Disassembler/ARM/
Dmove-banked-regs-thumb.txt47 @ CHECK: mrs r5, SPSR_svc
124 @ CHECK: msr SPSR_svc, r5
Dmove-banked-regs-arm.txt48 @ CHECK: mrs r5, SPSR_svc
122 @ CHECK: msr SPSR_svc, r5
/external/vixl/src/aarch32/
Dinstructions-aarch32.cc346 case SPSR_svc: in GetName()
Dinstructions-aarch32.h819 SPSR_svc = 0x32, enumerator