/external/llvm/lib/Fuzzer/test/ |
D | fuzzer-dirs.test | 2 RUN: mkdir -p %t/SUB1/SUB2/SUB3 4 RUN: echo b > %t/SUB1/SUB2/b 5 RUN: echo c > %t/SUB1/SUB2/SUB3/c
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/external/libvpx/vpx_dsp/mips/ |
D | fwd_dct32x32_msa.c | 96 SUB2(vec4, vec5, vec7, vec6, vec4, vec7); in fdct8x32_1d_column_even_store() 112 SUB2(in0, in1, in2, in3, in0, in2); in fdct8x32_1d_column_even_store() 118 SUB2(in9, vec2, in14, vec5, vec2, vec5); in fdct8x32_1d_column_even_store() 193 SUB2(in27, in26, in25, in24, in22, in21); in fdct8x32_1d_column_odd_store() 201 SUB2(in26, in27, in24, in25, in23, in20); in fdct8x32_1d_column_odd_store() 227 SUB2(in28, in29, in31, in30, in17, in18); in fdct8x32_1d_column_odd_store() 234 SUB2(in29, in28, in30, in31, in16, in19); in fdct8x32_1d_column_odd_store() 354 SUB2(vec4, vec5, vec7, vec6, vec4, vec7); in fdct8x32_1d_row_even_4x() 371 SUB2(in0, in1, in2, in3, in0, in2); in fdct8x32_1d_row_even_4x() 377 SUB2(in9, vec2, in14, vec5, vec2, vec5); in fdct8x32_1d_row_even_4x() [all …]
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D | idct32x32_msa.c | 160 SUB2(reg5, reg4, reg3, reg2, vec0, vec1); in idct32x8_row_odd_process_store() 218 SUB2(reg0, reg4, reg1, reg5, vec0, vec1); in idct32x8_row_odd_process_store() 221 SUB2(reg2, reg6, reg3, reg7, vec0, vec1); in idct32x8_row_odd_process_store() 232 SUB2(reg0, reg4, reg3, reg7, vec0, vec1); in idct32x8_row_odd_process_store() 235 SUB2(reg1, reg5, reg2, reg6, vec0, vec1); in idct32x8_row_odd_process_store() 465 SUB2(reg5, reg4, reg3, reg2, vec0, vec1); in idct8x32_column_odd_process_store() 517 SUB2(reg0, reg4, reg1, reg5, vec0, vec1); in idct8x32_column_odd_process_store() 520 SUB2(reg2, reg6, reg3, reg7, vec0, vec1); in idct8x32_column_odd_process_store() 531 SUB2(reg0, reg4, reg3, reg7, vec0, vec1); in idct8x32_column_odd_process_store() 534 SUB2(reg1, reg5, reg2, reg6, vec0, vec1); in idct8x32_column_odd_process_store()
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D | fwd_txfm_msa.c | 134 SUB2(stp34, stp25, stp33, stp22, in12, in11); in fdct8x16_1d_column()
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D | inv_txfm_msa.h | 228 SUB2(in1, in3, in7, in5, res0_m, res1_m); \
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D | macros_msa.h | 1573 #define SUB2(in0, in1, in2, in3, out0, out1) \ macro
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/external/libvpx/vp8/encoder/mips/msa/ |
D | quantize_msa.c | 58 SUB2(x0, sign_z0, x1, sign_z1, x0, x1); in fast_quantize_b_msa() 121 SUB2(x0, z_bin0, x1, z_bin1, z_bin0, z_bin1); in exact_regular_quantize_b_msa() 122 SUB2(z_bin0, zbin_o_q, z_bin1, zbin_o_q, z_bin0, z_bin1); in exact_regular_quantize_b_msa() 145 SUB2(sign_x0, sign_z0, sign_x1, sign_z1, sign_x0, sign_x1); in exact_regular_quantize_b_msa()
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D | denoising_msa.c | 214 SUB2(zero, abs_diff0, zero, abs_diff1, abs_diff_neg0, abs_diff_neg1); in vp8_denoiser_filter_msa() 250 SUB2(zero, abs_diff0, zero, abs_diff1, abs_diff_neg0, abs_diff_neg1); in vp8_denoiser_filter_msa()
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/external/libvpx/vp9/encoder/mips/msa/ |
D | vp9_fdct4x4_msa.c | 26 SUB2(in4, in1, in4, in2, in1, in2); in vp9_fwht4x4_msa() 35 SUB2(in4, in2, in4, in3, in2, in3); in vp9_fwht4x4_msa()
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/external/webp/src/dsp/ |
D | lossless_enc_msa.c | 33 SUB2(t0, t2, t1, t3, t0, t1); \ 109 SUB2(src0, tmp0, src1, tmp1, dst0, dst1); in SubtractGreenFromBlueAndRed_MSA()
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D | filters_msa.c | 31 SUB2(src0, pred0, src1, pred1, dst0, dst1); in PredictLineInverse0() 115 SUB2(a0, c0, a1, c1, a0, a1); in PredictLineGradient()
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D | rescaler_msa.c | 318 SUB2(src0, frac0, src1, frac1, src0, src1);
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D | enc_msa.c | 493 SUB2(d1, TL, d2, TL, d1, d2); in TrueMotion16x16() 835 SUB2(zero, tmp2, zero, tmp3, tmp0, tmp1); in QuantizeBlock_MSA()
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D | upsampling_msa.c | 557 SUB2(t0, t2, t1, t3, diag1, diag2); \
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D | msa_macro.h | 1190 #define SUB2(in0, in1, in2, in3, out0, out1) do { \ macro
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D | dec_msa.c | 802 SUB2(d1, TL, d2, TL, d1, d2); in TM16()
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/external/tensorflow/tensorflow/compiler/mlir/tensorflow/tests/ |
D | breakup-islands.mlir | 64 // CHECK: %[[SUB2:.*]], %[[SUB2_control:.*]] = tf_executor.island(%[[ADD2_control]], %[[MUL_cont… 65 // CHECK: %[[PRINT1:.*]], %[[PRINT1_control:.*]] = tf_executor.island wraps "tf.Print"(%[[SUB2]]…
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/external/llvm/test/Transforms/InstCombine/ |
D | icmp.ll | 1537 ; CHECK-NEXT: [[SUB2:%.*]] = sub i32 %Y, %X 1540 ; CHECK-NEXT: [[RES_IN_IN:%.*]] = phi i32 [ [[ADD]], %true ], [ [[SUB2]], %false ] 1572 ; CHECK-NEXT: [[SUB2:%.*]] = sub i32 %Y, %X 1575 ; CHECK-NEXT: [[RES_IN_IN:%.*]] = phi i32 [ [[SUB]], %true ], [ [[SUB2]], %false ]
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/external/tensorflow/tensorflow/compiler/mlir/tosa/tests/ |
D | tfl-to-tosa-pipeline.mlir | 491 // CHECK-DAG: %[[SUB2:.+]] = "tosa.sub"(%[[MUL1]], %[[ONE]]) 492 // CHECK-DAG: %[[MUL2:.+]] = "tosa.mul"(%[[SUB2]], %[[INT_MAX]]) 520 // CHECK-DAG: %[[SUB2:.+]] = "tosa.sub"(%[[MUL1]], %[[ONE]]) 521 // CHECK-DAG: %[[MUL2:.+]] = "tosa.mul"(%[[SUB2]], %[[INT_MAX]])
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/external/pcre/src/ |
D | pcre2test.c | 1557 #define SUB2(a,b,c) \ macro 2025 #define SUB2(a,b,c) \ macro 2148 #define SUB2(a,b,c) G(a,8)(G(b,8),G(c,8)) macro 2256 #define SUB2(a,b,c) G(a,16)(G(b,16),G(c,16)) macro 2364 #define SUB2(a,b,c) G(a,32)(G(b,32),G(c,32)) macro
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
D | ARCInstrInfo.td | 225 defm SUB2 : ArcBinaryGEN4Inst<0b011000, "sub2">;
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/external/libvpx/vp8/common/mips/msa/ |
D | vp8_macros_msa.h | 1470 #define SUB2(in0, in1, in2, in3, out0, out1) \ macro
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