Home
last modified time | relevance | path

Searched refs:SXTB (Results 1 – 25 of 52) sorted by relevance

123

/external/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64AddressingModes.h45 SXTB, enumerator
64 case AArch64_AM::SXTB: return "sxtb"; in getShiftExtendName()
131 case 4: return AArch64_AM::SXTB; in getExtendType()
158 case AArch64_AM::SXTB: return 4; break; in getExtendEncoding()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64AddressingModes.h45 SXTB, enumerator
64 case AArch64_AM::SXTB: return "sxtb"; in getShiftExtendName()
131 case 4: return AArch64_AM::SXTB; in getExtendType()
158 case AArch64_AM::SXTB: return 4; break; in getExtendEncoding()
/external/vixl/test/aarch32/config/
Dcond-rd-operand-rn-t32.json54 "Sxtb", // SXTB{<c>}{<q>} {<Rd>}, <Rm> ; T1
55 // SXTB{<c>}{<q>} {<Rd>}, <Rm> {, ROR #<amount> } ; T2
Dcond-rd-operand-rn-ror-amount-a32.json32 "Sxtb", // SXTB{<c>}{<q>} {<Rd>}, <Rm> {, ROR #<amount> } ; A1
Dcond-rd-operand-rn-ror-amount-t32.json32 "Sxtb", // SXTB{<c>}{<q>} {<Rd>}, <Rm> {, ROR #<amount> } ; T2
Dcond-rd-operand-rn-a32.json46 "Sxtb", // SXTB{<c>}{<q>} {<Rd>}, <Rm> {, ROR #<amount> } ; A1
/external/llvm/test/MC/Disassembler/ARM/
Dthumb1.txt503 # SXTB/SXTH
Dinvalid-armv7.txt330 # A8.6.223 SXTB
Dthumb2.txt2157 # SXTB
2211 # SXTB
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h364 SXTB, enumerator
/external/vixl/test/aarch64/
Dtest-assembler-aarch64.cc136 __ Add(sp, sp, Operand(x17, SXTB)); in TEST()
189 __ Mvn(x11, Operand(x2, SXTB, 1)); in TEST()
363 __ Mov(x24, Operand(x13, SXTB, 1)); in TEST()
417 __ Mov(w20, Operand(w11, SXTB, 1)); in TEST()
501 __ Orr(w10, w0, Operand(w1, SXTB)); in TEST()
595 __ Orn(w10, w0, Operand(w1, SXTB)); in TEST()
662 __ And(w10, w0, Operand(w1, SXTB)); in TEST()
808 __ Bic(w10, w0, Operand(w1, SXTB)); in TEST()
940 __ Eor(w10, w0, Operand(w1, SXTB)); in TEST()
1007 __ Eon(w10, w0, Operand(w1, SXTB)); in TEST()
[all …]
Dtest-disasm-aarch64.cc341 COMPARE(adds(w15, w16, Operand(w17, SXTB, 4)), "adds w15, w16, w17, sxtb #4"); in TEST()
342 COMPARE(add(x18, x19, Operand(x20, SXTB, 3)), "add x18, x19, w20, sxtb #3"); in TEST()
367 COMPARE(subs(w15, w16, Operand(w17, SXTB, 4)), "subs w15, w16, w17, sxtb #4"); in TEST()
368 COMPARE(sub(x18, x19, Operand(x20, SXTB, 3)), "sub x18, x19, w20, sxtb #3"); in TEST()
372 COMPARE(cmp(w0, Operand(w1, SXTB, 1)), "cmp w0, w1, sxtb #1"); in TEST()
2437 COMPARE_MACRO(Csel(x12, Operand(x13, LSL, 13), Operand(x14, SXTB), eq), in TEST()
2443 Operand(x14, SXTB), in TEST()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h462 SXTB, enumerator
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SchedPredicates.td22 def CheckExtSXTB : CheckImmOperand_s<3, "AArch64_AM::SXTB">;
/external/llvm/test/MC/ARM/
Dbasic-thumb-instructions.s638 @ SXTB/SXTH
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstructionSelector.cpp305 STORE_OPCODE(SEXT8, SXTB); in OpcodeCache()
DARMFastISel.cpp2660 /* 8 bit sext */ { { ARM::SXTB , 0, ARM_AM::no_shift, 0 }, in ARMEmitIntExt()
2905 { { ARM::SXTB, ARM::t2SXTB }, 0, 0, MVT::i8 },
DARMScheduleR52.td215 (instregex "SXTB", "SXTH", "SXTB16", "UXTB", "UXTH", "UXTB16",
DARMScheduleSwift.td161 (instregex "SXTB", "SXTH", "SXTB16", "UXTB", "UXTH", "UXTB16",
/external/llvm/lib/Target/ARM/
DARMFastISel.cpp2641 /* 8 bit sext */ { { ARM::SXTB , 0, ARM_AM::no_shift, 0 }, in ARMEmitIntExt()
2886 { { ARM::SXTB, ARM::t2SXTB }, 0, 0, MVT::i8 },
DARMScheduleSwift.td157 (instregex "SXTB", "SXTH", "SXTB16", "UXTB", "UXTH", "UXTB16",
/external/pcre/src/sljit/
DsljitNativeARM_T2_32.c183 #define SXTB 0xb240 macro
820 return push_inst16(compiler, SXTB | RD3(dst) | RN3(arg2)); in emit_op_imm()
DsljitNativeARM_32.c144 #define SXTB 0xe6af0070 macro
1456 return push_inst(compiler, (op == SLJIT_MOV_U8 ? UXTB : SXTB) | RD(dst) | RM(src2)); in emit_single_op()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp1251 return (ET == AArch64_AM::UXTB || ET == AArch64_AM::SXTB || in isExtend()
1264 return ET == AArch64_AM::UXTB || ET == AArch64_AM::SXTB || in isExtend64()
2754 .Case("sxtb", AArch64_AM::SXTB) in tryParseOptionalShiftExtend()
/external/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp988 return (ET == AArch64_AM::UXTB || ET == AArch64_AM::SXTB || in isExtend()
2393 .Case("sxtb", AArch64_AM::SXTB) in tryParseOptionalShiftExtend()

123