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Searched refs:ScheduleDAGInstrs (Results 1 – 25 of 42) sorted by relevance

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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DScheduleDAGInstrs.cpp98 static void dumpSUList(ScheduleDAGInstrs::SUList &L) { in dumpSUList()
110 ScheduleDAGInstrs::ScheduleDAGInstrs(MachineFunction &mf, in ScheduleDAGInstrs() function in ScheduleDAGInstrs
177 void ScheduleDAGInstrs::startBlock(MachineBasicBlock *bb) { in startBlock()
181 void ScheduleDAGInstrs::finishBlock() { in finishBlock()
186 void ScheduleDAGInstrs::enterRegion(MachineBasicBlock *bb, in enterRegion()
196 void ScheduleDAGInstrs::exitRegion() { in exitRegion()
200 void ScheduleDAGInstrs::addSchedBarrierDeps() { in addSchedBarrierDeps()
229 void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDataDeps()
289 void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDeps()
366 LaneBitmask ScheduleDAGInstrs::getLaneMaskForMO(const MachineOperand &MO) const in getLaneMaskForMO()
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DMacroFusion.cpp54 static bool fuseInstructionPair(ScheduleDAGInstrs &DAG, SUnit &FirstSU, in fuseInstructionPair()
143 bool scheduleAdjacentImpl(ScheduleDAGInstrs &DAG, SUnit &AnchorSU);
149 void apply(ScheduleDAGInstrs *DAGInstrs) override;
154 void MacroFusion::apply(ScheduleDAGInstrs *DAG) { in apply()
168 bool MacroFusion::scheduleAdjacentImpl(ScheduleDAGInstrs &DAG, SUnit &AnchorSU) { in scheduleAdjacentImpl()
DPostRASchedulerList.cpp114 class SchedulePostRATDList : public ScheduleDAGInstrs {
211 : ScheduleDAGInstrs(MF, &MLI), AA(AA), EndIndex(0) { in SchedulePostRATDList()
240 ScheduleDAGInstrs::enterRegion(bb, begin, end, regioninstrs); in enterRegion()
251 ScheduleDAGInstrs::exitRegion(); in exitRegion()
381 ScheduleDAGInstrs::startBlock(BB); in startBlock()
439 ScheduleDAGInstrs::finishBlock(); in finishBlock()
DMachineScheduler.cpp161 void scheduleRegions(ScheduleDAGInstrs &Scheduler, bool FixKillFlags);
176 ScheduleDAGInstrs *createMachineScheduler();
191 ScheduleDAGInstrs *createPostMachineScheduler();
252 static ScheduleDAGInstrs *useDefaultMachineSched(MachineSchedContext *C) { in useDefaultMachineSched()
318 ScheduleDAGInstrs *MachineScheduler::createMachineScheduler() { in createMachineScheduler()
325 ScheduleDAGInstrs *Scheduler = PassConfig->createMachineScheduler(this); in createMachineScheduler()
336 ScheduleDAGInstrs *PostMachineScheduler::createPostMachineScheduler() { in createPostMachineScheduler()
338 ScheduleDAGInstrs *Scheduler = PassConfig->createPostMachineScheduler(this); in createPostMachineScheduler()
391 std::unique_ptr<ScheduleDAGInstrs> Scheduler(createMachineScheduler()); in runOnMachineFunction()
424 std::unique_ptr<ScheduleDAGInstrs> Scheduler(createPostMachineScheduler()); in runOnMachineFunction()
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DDFAPacketizer.cpp105 class DefaultVLIWScheduler : public ScheduleDAGInstrs {
132 : ScheduleDAGInstrs(MF, &MLI), AA(AA) { in DefaultVLIWScheduler()
/external/llvm/lib/CodeGen/
DScheduleDAGInstrs.cpp77 static void dumpSUList(ScheduleDAGInstrs::SUList &L) { in dumpSUList()
89 ScheduleDAGInstrs::ScheduleDAGInstrs(MachineFunction &mf, in ScheduleDAGInstrs() function in ScheduleDAGInstrs
212 void ScheduleDAGInstrs::startBlock(MachineBasicBlock *bb) { in startBlock()
216 void ScheduleDAGInstrs::finishBlock() { in finishBlock()
225 void ScheduleDAGInstrs::enterRegion(MachineBasicBlock *bb, in enterRegion()
237 void ScheduleDAGInstrs::exitRegion() { in exitRegion()
249 void ScheduleDAGInstrs::addSchedBarrierDeps() { in addSchedBarrierDeps()
283 void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDataDeps()
326 void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDeps()
401 LaneBitmask ScheduleDAGInstrs::getLaneMaskForMO(const MachineOperand &MO) const in getLaneMaskForMO()
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DPostRASchedulerList.cpp114 class SchedulePostRATDList : public ScheduleDAGInstrs {
211 : ScheduleDAGInstrs(MF, &MLI), AA(AA), EndIndex(0) { in SchedulePostRATDList()
240 ScheduleDAGInstrs::enterRegion(bb, begin, end, regioninstrs); in enterRegion()
251 ScheduleDAGInstrs::exitRegion(); in exitRegion()
381 ScheduleDAGInstrs::startBlock(BB); in startBlock()
444 ScheduleDAGInstrs::finishBlock(); in finishBlock()
DMachineScheduler.cpp120 void scheduleRegions(ScheduleDAGInstrs &Scheduler, bool FixKillFlags);
135 ScheduleDAGInstrs *createMachineScheduler();
150 ScheduleDAGInstrs *createPostMachineScheduler();
208 static ScheduleDAGInstrs *useDefaultMachineSched(MachineSchedContext *C) { in useDefaultMachineSched()
235 static ScheduleDAGInstrs *createGenericSchedLive(MachineSchedContext *C);
236 static ScheduleDAGInstrs *createGenericSchedPostRA(MachineSchedContext *C);
283 ScheduleDAGInstrs *MachineScheduler::createMachineScheduler() { in createMachineScheduler()
290 ScheduleDAGInstrs *Scheduler = PassConfig->createMachineScheduler(this); in createMachineScheduler()
301 ScheduleDAGInstrs *PostMachineScheduler::createPostMachineScheduler() { in createPostMachineScheduler()
303 ScheduleDAGInstrs *Scheduler = PassConfig->createPostMachineScheduler(this); in createPostMachineScheduler()
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DDFAPacketizer.cpp159 class DefaultVLIWScheduler : public ScheduleDAGInstrs {
183 : ScheduleDAGInstrs(MF, &MLI), AA(AA) { in DefaultVLIWScheduler()
/external/llvm/include/llvm/CodeGen/
DScheduleDAGInstrs.h100 class ScheduleDAGInstrs : public ScheduleDAG {
236 explicit ScheduleDAGInstrs(MachineFunction &mf,
240 ~ScheduleDAGInstrs() override {} in ~ScheduleDAGInstrs()
341 inline SUnit *ScheduleDAGInstrs::newSUnit(MachineInstr *MI) { in newSUnit()
353 inline SUnit *ScheduleDAGInstrs::getSUnit(MachineInstr *MI) const { in getSUnit()
DScheduleDAGMutation.h19 class ScheduleDAGInstrs; variable
27 virtual void apply(ScheduleDAGInstrs *DAG) = 0;
DTargetPassConfig.h24 class ScheduleDAGInstrs; variable
242 virtual ScheduleDAGInstrs *
249 virtual ScheduleDAGInstrs *
DMachineScheduler.h94 class ScheduleDAGInstrs; variable
118 typedef ScheduleDAGInstrs *(*ScheduleDAGCtor)(MachineSchedContext *);
226 class ScheduleDAGMI : public ScheduleDAGInstrs {
257 : ScheduleDAGInstrs(*C->MF, C->MLI, RemoveKillFlags), AA(C->AA), in ScheduleDAGMI()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DScheduleDAGInstrs.h119 class ScheduleDAGInstrs : public ScheduleDAG {
255 explicit ScheduleDAGInstrs(MachineFunction &mf,
259 ~ScheduleDAGInstrs() override = default;
384 inline SUnit *ScheduleDAGInstrs::newSUnit(MachineInstr *MI) { in newSUnit()
395 inline SUnit *ScheduleDAGInstrs::getSUnit(MachineInstr *MI) const { in getSUnit()
DScheduleDAGMutation.h19 class ScheduleDAGInstrs; variable
28 virtual void apply(ScheduleDAGInstrs *DAG) = 0;
DTargetPassConfig.h26 class ScheduleDAGInstrs; variable
286 virtual ScheduleDAGInstrs *
293 virtual ScheduleDAGInstrs *
DMachinePipeliner.h112 class SwingSchedulerDAG : public ScheduleDAGInstrs {
196 void apply(ScheduleDAGInstrs *DAG) override;
202 : ScheduleDAGInstrs(*P.MF, P.MLI, false), Pass(P), Loop(L), LIS(lis), in SwingSchedulerDAG()
282 static bool classof(const ScheduleDAGInstrs *DAG) { return true; } in classof()
DMachineScheduler.h137 ScheduleDAGInstrs *(*)(MachineSchedContext *)> {
139 using ScheduleDAGCtor = ScheduleDAGInstrs *(*)(MachineSchedContext *);
262 class ScheduleDAGMI : public ScheduleDAGInstrs {
290 : ScheduleDAGInstrs(*C->MF, C->MLI, RemoveKillFlags), AA(C->AA), in ScheduleDAGMI()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonSubtarget.h70 void apply(ScheduleDAGInstrs *DAG) override;
73 void apply(ScheduleDAGInstrs *DAG) override;
76 void apply(ScheduleDAGInstrs *DAG) override;
82 void apply(ScheduleDAGInstrs *DAG) override;
DHexagonSubtarget.cpp128 void HexagonSubtarget::UsrOverflowMutation::apply(ScheduleDAGInstrs *DAG) { in apply()
141 void HexagonSubtarget::HVXMemLatencyMutation::apply(ScheduleDAGInstrs *DAG) { in apply()
192 void HexagonSubtarget::CallMutation::apply(ScheduleDAGInstrs *DAGInstrs) { in apply()
262 void HexagonSubtarget::BankConflictMutation::apply(ScheduleDAGInstrs *DAG) { in apply()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUTargetMachine.cpp251 static ScheduleDAGInstrs *createR600MachineScheduler(MachineSchedContext *C) { in createR600MachineScheduler()
255 static ScheduleDAGInstrs *createSIMachineScheduler(MachineSchedContext *C) { in createSIMachineScheduler()
259 static ScheduleDAGInstrs *
269 static ScheduleDAGInstrs *
278 static ScheduleDAGInstrs *createMinRegScheduler(MachineSchedContext *C) { in createMinRegScheduler()
283 static ScheduleDAGInstrs *
557 ScheduleDAGInstrs *
585 ScheduleDAGInstrs *createMachineScheduler( in createMachineScheduler()
611 ScheduleDAGInstrs *
816 ScheduleDAGInstrs *GCNPassConfig::createMachineScheduler( in createMachineScheduler()
/external/llvm/lib/Target/AMDGPU/
DAMDGPU.h26 class ScheduleDAGInstrs; variable
55 ScheduleDAGInstrs *createSIMachineScheduler(MachineSchedContext *C);
DAMDGPUTargetMachine.cpp98 static ScheduleDAGInstrs *createR600MachineScheduler(MachineSchedContext *C) { in createR600MachineScheduler()
289 ScheduleDAGInstrs *createMachineScheduler( in createMachineScheduler()
309 ScheduleDAGInstrs *
465 ScheduleDAGInstrs *GCNPassConfig::createMachineScheduler( in createMachineScheduler()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCTargetMachine.cpp267 static ScheduleDAGInstrs *createPPCMachineScheduler(MachineSchedContext *C) { in createPPCMachineScheduler()
278 static ScheduleDAGInstrs *createPPCPostMachineScheduler( in createPPCPostMachineScheduler()
382 ScheduleDAGInstrs *
386 ScheduleDAGInstrs *
/external/llvm/lib/Target/Hexagon/
DHexagonTargetMachine.cpp95 static ScheduleDAGInstrs *createVLIWMachineSched(MachineSchedContext *C) { in createVLIWMachineSched()
203 ScheduleDAGInstrs *

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