Searched refs:SegmentReg (Results 1 – 7 of 7) sorted by relevance
| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstX8632.cpp | 2863 SegmentRegisters SegmentReg, bool IsRebased) in X86OperandMem() argument
2865 Shift(Shift), SegmentReg(SegmentReg), IsRebased(IsRebased) { in X86OperandMem()
2902 if (SegmentReg != DefaultSegment) { in emit()
2903 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); in emit()
2904 Str << "%" << InstSegmentRegNames[SegmentReg] << ":"; in emit()
2943 if (SegmentReg != DefaultSegment) { in dump()
2944 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); in dump()
2945 Str << InstSegmentRegNames[SegmentReg] << ":"; in dump()
3005 if (SegmentReg != DefaultSegment) { in emitSegmentOverride()
3006 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); in emitSegmentOverride()
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| D | IceInstX8632.h | 91 SegmentRegisters SegmentReg = DefaultSegment,
94 Func, Ty, Base, Offset, Index, Shift, SegmentReg, IsRebased);
107 SegmentRegisters getSegmentRegister() const { return SegmentReg; } in getSegmentRegister()
132 Variable *Index, uint16_t Shift, SegmentRegisters SegmentReg,
139 const SegmentRegisters SegmentReg : 16; variable
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| D | IceTargetLoweringX8664.cpp | 4919 static constexpr auto SegmentReg = in computeAddressOpt() local
4923 NewAddr.Index, NewAddr.Shift, SegmentReg); in computeAddressOpt()
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| D | IceTargetLoweringX8632.cpp | 5509 static constexpr auto SegmentReg = in computeAddressOpt() local
5513 NewAddr.Index, NewAddr.Shift, SegmentReg); in computeAddressOpt()
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| /external/llvm/lib/Target/X86/ |
| D | X86MCInstLower.cpp | 780 unsigned Opc, BaseReg, ScaleVal, IndexReg, Displacement, SegmentReg; in EmitNop() local
781 Opc = IndexReg = Displacement = SegmentReg = 0; in EmitNop()
800 IndexReg = X86::RAX; SegmentReg = X86::CS; break; in EmitNop()
825 .addReg(SegmentReg), in EmitNop()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86MCInstLower.cpp | 1062 unsigned Opc, BaseReg, ScaleVal, IndexReg, Displacement, SegmentReg; in EmitNop() local
1063 IndexReg = Displacement = SegmentReg = 0; in EmitNop()
1121 SegmentReg = X86::CS; in EmitNop()
1145 .addReg(SegmentReg), in EmitNop()
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| /external/llvm/docs/ |
| D | CodeGenerator.rst | 2167 SegmentReg: Base + [1,2,4,8] * IndexReg + Disp32
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