Searched refs:ShiftAmtTy (Results 1 – 8 of 8) sorted by relevance
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
D | LegalizerHelper.h | 214 LLT HalfTy, LLT ShiftAmtTy);
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64RegisterBankInfo.cpp | 559 LLT ShiftAmtTy = MRI.getType(MI.getOperand(2).getReg()); in getInstrMapping() local 561 if (ShiftAmtTy.getSizeInBits() == 64 && SrcTy.getSizeInBits() == 32) in getInstrMapping()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
D | LegalizerHelper.cpp | 3189 LLT ShiftAmtTy = MRI.getType(Amt); in narrowScalarShift() local 3204 MI, KShiftAmt->getOperand(1).getCImm()->getValue(), HalfTy, ShiftAmtTy); in narrowScalarShift() 3210 auto NewBits = MIRBuilder.buildConstant(ShiftAmtTy, NewBitSize); in narrowScalarShift() 3216 auto AmtExcess = MIRBuilder.buildSub(ShiftAmtTy, Amt, NewBits); in narrowScalarShift() 3217 auto AmtLack = MIRBuilder.buildSub(ShiftAmtTy, NewBits, Amt); in narrowScalarShift() 3219 auto Zero = MIRBuilder.buildConstant(ShiftAmtTy, 0); in narrowScalarShift() 3259 auto ShiftAmt = MIRBuilder.buildConstant(ShiftAmtTy, NewBitSize - 1); in narrowScalarShift()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeIntegerTypes.cpp | 353 EVT ShiftAmtTy = TLI.getShiftAmountTy(NOutVT, DAG.getDataLayout()); in PromoteIntRes_BITCAST() local 356 DAG.getConstant(ShiftAmt, dl, ShiftAmtTy)); in PromoteIntRes_BITCAST() 2674 EVT ShiftAmtTy = TLI.getShiftAmountTy(NVT, DAG.getDataLayout()); in ExpandIntRes_FLT_ROUNDS() local 2678 DAG.getConstant(NBitWidth - 1, dl, ShiftAmtTy)); in ExpandIntRes_FLT_ROUNDS() 2958 EVT ShiftAmtTy = TLI.getShiftAmountTy(NVT, DAG.getDataLayout()); in ExpandIntRes_MUL() local 2959 if (APInt::getMaxValue(ShiftAmtTy.getSizeInBits()).ult(HalfBits)) { in ExpandIntRes_MUL() 2962 ShiftAmtTy = MVT::i32; in ExpandIntRes_MUL() 2964 SDValue Shift = DAG.getConstant(HalfBits, dl, ShiftAmtTy); in ExpandIntRes_MUL()
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D | TargetLowering.cpp | 1612 EVT ShiftAmtTy = VT; in SimplifyDemandedBits() local 1613 if (TLO.LegalTypes() && !ShiftAmtTy.isVector()) in SimplifyDemandedBits() 1614 ShiftAmtTy = getShiftAmountTy(ShiftAmtTy, DL); in SimplifyDemandedBits() 1617 TLO.DAG.getConstant(BitWidth - ExVTBits, dl, ShiftAmtTy); in SimplifyDemandedBits() 7477 EVT ShiftAmtTy = getShiftAmountTy(VT, DAG.getDataLayout()); in expandMULO() local 7478 SDValue ShiftAmt = DAG.getConstant(C.logBase2(), dl, ShiftAmtTy); in expandMULO()
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D | DAGCombiner.cpp | 3826 EVT ShiftAmtTy = getShiftAmountTy(N0.getValueType()); in visitSDIVLike() local 3827 SDValue Bits = DAG.getConstant(BitWidth, DL, ShiftAmtTy); in visitSDIVLike() 3829 C1 = DAG.getZExtOrTrunc(C1, DL, ShiftAmtTy); in visitSDIVLike() 3830 SDValue Inexact = DAG.getNode(ISD::SUB, DL, ShiftAmtTy, Bits, C1); in visitSDIVLike() 3836 DAG.getConstant(BitWidth - 1, DL, ShiftAmtTy)); in visitSDIVLike() 20260 EVT ShiftAmtTy = getShiftAmountTy(N0.getValueType()); in foldSelectCCToShiftAnd() local 20265 SDValue ShiftAmt = DAG.getConstant(ShCt, DL, ShiftAmtTy); in foldSelectCCToShiftAnd() 20285 SDValue ShiftAmt = DAG.getConstant(ShCt, DL, ShiftAmtTy); in foldSelectCCToShiftAnd()
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D | LegalizeVectorTypes.cpp | 3482 EVT ShiftAmtTy = TLI.getShiftAmountTy(NInVT, DAG.getDataLayout()); in WidenVecRes_BITCAST() local 3485 DAG.getConstant(ShiftAmt, dl, ShiftAmtTy)); in WidenVecRes_BITCAST()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | TargetLowering.cpp | 879 EVT ShiftAmtTy = Op.getValueType(); in SimplifyDemandedBits() local 880 if (TLO.LegalTypes() && !ShiftAmtTy.isVector()) in SimplifyDemandedBits() 881 ShiftAmtTy = getShiftAmountTy(ShiftAmtTy, DL); in SimplifyDemandedBits() 884 ShiftAmtTy); in SimplifyDemandedBits()
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