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Searched refs:SrcBank (Results 1 – 3 of 3) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPURegisterBankInfo.cpp69 const RegisterBank *SrcBank = RBI.getRegBank(SrcReg, MRI, *RBI.TRI); in applyBank() local
70 if (SrcBank == &AMDGPU::VCCRegBank) { in applyBank()
1494 const RegisterBank *SrcBank = getRegBank(SrcReg, MRI, *TRI); in applyMappingImpl() local
1496 if (SrcBank != &AMDGPU::VCCRegBank) { in applyMappingImpl()
1779 const RegisterBank *SrcBank = in applyMappingImpl() local
1785 SrcBank != &AMDGPU::SGPRRegBank && in applyMappingImpl()
1786 SrcBank != &AMDGPU::VCCRegBank && in applyMappingImpl()
1801 MRI.setRegBank(ShiftAmt.getReg(0), *SrcBank); in applyMappingImpl()
1808 MRI.setRegBank(DstReg, *SrcBank); in applyMappingImpl()
1816 if (SrcBank == &AMDGPU::VCCRegBank) { in applyMappingImpl()
[all …]
DAMDGPUInstructionSelector.cpp462 const RegisterBank *SrcBank = RBI.getRegBank(SrcReg, *MRI, TRI); in selectG_EXTRACT() local
464 TRI.getRegClassForSizeOnBank(SrcSize, *SrcBank, *MRI); in selectG_EXTRACT()
538 const RegisterBank *SrcBank = RBI.getRegBank(SrcReg, *MRI, TRI); in selectG_UNMERGE_VALUES() local
541 TRI.getRegClassForSizeOnBank(SrcSize, *SrcBank, *MRI); in selectG_UNMERGE_VALUES()
1338 const RegisterBank *SrcBank = getArtifactRegBank(SrcReg, *MRI, TRI); in selectG_SZA_EXT() local
1340 if (SrcBank->getID() == AMDGPU::VGPRRegBankID && DstSize <= 32) { in selectG_SZA_EXT()
1364 if (SrcBank->getID() == AMDGPU::SGPRRegBankID && DstSize <= 64) { in selectG_SZA_EXT()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DCombinerHelper.cpp95 const RegisterBank *SrcBank = MRI.getRegBankOrNull(SrcReg); in matchCombineCopy() local
100 if ((SrcRC == DstRC) && (SrcBank == DstBank)) in matchCombineCopy()