Searched refs:TRCVIPCSSCTLR (Results 1 – 7 of 7) sorted by relevance
| /external/OpenCSD/decoder/tests/snapshots/a57_single_step/ |
| D | device2.ini | 22 TRCVIPCSSCTLR(id:0x23)=0x00000000
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| /external/OpenCSD/decoder/tests/snapshots/a55-test-tpiu/ |
| D | device2.ini | 22 TRCVIPCSSCTLR(id:0x23)=0x00000000
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | trace-regs.txt | 109 # CHECK: mrs x8, {{trcvipcssctlr|TRCVIPCSSCTLR}}
441 # CHECK: msr {{trcvipcssctlr|TRCVIPCSSCTLR}}, x0
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| /external/rust/crates/gdbstub_arch/src/aarch64/reg/ |
| D | id.rs | 1308 pub const TRCVIPCSSCTLR: Self = Self::System(0b10_001_0000_0011_010); constant
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 578 TRCVIPCSSCTLR = 34842,
2642 { "TRCVIPCSSCTLR", 0x881A, true, true, {} }, // 388
3760 { "TRCVIPCSSCTLR", 388 },
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 726 def : RWSysReg<"TRCVIPCSSCTLR", 0b10, 0b001, 0b0000, 0b0011, 0b010>;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 1000 def : RWSysReg<"TRCVIPCSSCTLR", 0b10, 0b001, 0b0000, 0b0011, 0b010>;
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