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Searched refs:UMIN (Results 1 – 25 of 110) sorted by relevance

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/external/libhevc/common/arm64/
Dihevc_sao_edge_offset_class1.s183UMIN v20.8h, v20.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
194UMIN v1.8h, v1.8h , v4.8h //pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u16…
205UMIN v26.8h, v26.8h , v4.8h //II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_…
208UMIN v28.8h, v28.8h , v4.8h //II pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_…
237UMIN v26.8h, v26.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
243UMIN v28.8h, v28.8h , v4.8h //pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u16…
313UMIN v20.8h, v20.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
319UMIN v26.8h, v26.8h , v4.8h //II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_…
348UMIN v26.8h, v26.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
Dihevc_sao_edge_offset_class1_chroma.s219UMIN v20.8h, v20.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
240UMIN v28.8h, v28.8h , v4.8h //pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u16…
253UMIN v26.8h, v26.8h , v4.8h //II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_…
256UMIN v28.8h, v28.8h , v4.8h //II pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_…
297UMIN v26.8h, v26.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
303UMIN v28.8h, v28.8h , v4.8h //pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u16…
394UMIN v20.8h, v20.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
406UMIN v26.8h, v26.8h , v4.8h //II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_…
447UMIN v26.8h, v26.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
Dihevc_sao_edge_offset_class0.s221UMIN v18.8h, v18.8h , v6.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
232UMIN v21.8h, v21.8h , v6.8h //pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u16…
241UMIN v0.8h, v0.8h , v6.8h //II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_…
248UMIN v28.8h, v28.8h , v6.8h //II pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_…
322UMIN v28.8h, v28.8h , v6.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
Dihevc_sao_edge_offset_class2.s342UMIN v20.8h, v20.8h , v4.8h //I pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u…
351UMIN v22.8h, v22.8h , v4.8h //I pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u…
439UMIN v26.8h, v26.8h , v4.8h //II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_…
444UMIN v20.8h, v20.8h , v4.8h //III pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq…
450UMIN v28.8h, v28.8h , v4.8h //II pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_…
463UMIN v18.8h, v18.8h , v4.8h //III pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq…
520UMIN v20.8h, v20.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
526UMIN v5.8h, v5.8h , v4.8h //pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u16…
656UMIN v28.8h, v28.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
662UMIN v30.8h, v30.8h , v4.8h //pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u16…
[all …]
Dihevc_sao_edge_offset_class3.s354UMIN v20.8h, v20.8h , v4.8h //I pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u…
360UMIN v22.8h, v22.8h , v4.8h //I pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u…
458UMIN v28.8h, v28.8h , v4.8h //II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_…
468UMIN v26.8h, v26.8h , v4.8h //II pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_…
475UMIN v20.8h, v20.8h , v4.8h //III pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq…
484UMIN v22.8h, v22.8h , v4.8h //III pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq…
550UMIN v20.8h, v20.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
554UMIN v22.8h, v22.8h , v4.8h //pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u16…
694UMIN v28.8h, v28.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
700UMIN v30.8h, v30.8h , v4.8h //pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u16…
[all …]
Dihevc_sao_edge_offset_class0_chroma.s259UMIN v18.8h, v18.8h , v6.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
269UMIN v19.8h, v19.8h , v6.8h //pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u16…
292UMIN v28.8h, v28.8h , v6.8h //II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_…
304UMIN v30.8h, v30.8h , v6.8h //II pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_…
436UMIN v18.8h, v18.8h , v6.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
465UMIN v24.8h, v24.8h , v6.8h //II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_…
Dihevc_sao_edge_offset_class2_chroma.s488UMIN v20.8h, v20.8h , v4.8h //I pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u…
493UMIN v18.8h, v18.8h , v4.8h //I pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u…
621UMIN v28.8h, v28.8h , v4.8h //II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_…
643UMIN v26.8h, v26.8h , v4.8h //II pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_…
656UMIN v20.8h, v20.8h , v4.8h //III pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq…
664UMIN v18.8h, v18.8h , v4.8h //III pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq…
742UMIN v20.8h, v20.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
746UMIN v18.8h, v18.8h , v4.8h //pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u16…
909UMIN v28.8h, v28.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
914UMIN v26.8h, v26.8h , v4.8h //pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u16…
[all …]
Dihevc_sao_edge_offset_class3_chroma.s471UMIN v20.8h, v20.8h , v4.8h //I pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u…
479UMIN v18.8h, v18.8h , v4.8h //I pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u…
621UMIN v28.8h, v28.8h , v4.8h //II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_…
636UMIN v26.8h, v26.8h , v4.8h //II pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_…
643UMIN v20.8h, v20.8h , v4.8h //III pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq…
650UMIN v18.8h, v18.8h , v4.8h //III pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq…
732UMIN v20.8h, v20.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
736UMIN v18.8h, v18.8h , v4.8h //pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u16…
921UMIN v28.8h, v28.8h , v4.8h //pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vminq_u16…
927UMIN v30.8h, v30.8h , v4.8h //pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vminq_u16…
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp2767 ISD = IsUnsigned ? ISD::UMIN : ISD::SMIN; in getMinMaxReductionCost()
2784 {ISD::UMIN, MVT::v2i64, 8}, in getMinMaxReductionCost()
2786 {ISD::UMIN, MVT::v4i32, 8}, in getMinMaxReductionCost()
2788 {ISD::UMIN, MVT::v8i16, 6}, in getMinMaxReductionCost()
2790 {ISD::UMIN, MVT::v16i8, 6}, in getMinMaxReductionCost()
2796 {ISD::UMIN, MVT::v2i64,10}, in getMinMaxReductionCost()
2798 {ISD::UMIN, MVT::v4i32, 2}, // The data reported by the IACA is "1.8" in getMinMaxReductionCost()
2800 {ISD::UMIN, MVT::v8i16, 2}, in getMinMaxReductionCost()
2802 {ISD::UMIN, MVT::v16i8, 3}, in getMinMaxReductionCost()
2807 {ISD::UMIN, MVT::v2i64, 8}, // The data reported by the IACA is "8.6" in getMinMaxReductionCost()
[all …]
/external/strace/xlat/
Datomic_ops.in9 { OR1K_ATOMIC_UMIN, "UMIN" },
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h325 SMIN, SMAX, UMIN, UMAX, enumerator
/external/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h984 X86_INTRINSIC_DATA(avx512_mask_pminu_b_128, INTR_TYPE_2OP_MASK, ISD::UMIN, 0),
985 X86_INTRINSIC_DATA(avx512_mask_pminu_b_256, INTR_TYPE_2OP_MASK, ISD::UMIN, 0),
986 X86_INTRINSIC_DATA(avx512_mask_pminu_b_512, INTR_TYPE_2OP_MASK, ISD::UMIN, 0),
987 X86_INTRINSIC_DATA(avx512_mask_pminu_d_128, INTR_TYPE_2OP_MASK, ISD::UMIN, 0),
988 X86_INTRINSIC_DATA(avx512_mask_pminu_d_256, INTR_TYPE_2OP_MASK, ISD::UMIN, 0),
989 X86_INTRINSIC_DATA(avx512_mask_pminu_d_512, INTR_TYPE_2OP_MASK, ISD::UMIN, 0),
990 X86_INTRINSIC_DATA(avx512_mask_pminu_q_128, INTR_TYPE_2OP_MASK, ISD::UMIN, 0),
991 X86_INTRINSIC_DATA(avx512_mask_pminu_q_256, INTR_TYPE_2OP_MASK, ISD::UMIN, 0),
992 X86_INTRINSIC_DATA(avx512_mask_pminu_q_512, INTR_TYPE_2OP_MASK, ISD::UMIN, 0),
993 X86_INTRINSIC_DATA(avx512_mask_pminu_w_128, INTR_TYPE_2OP_MASK, ISD::UMIN, 0),
[all …]
/external/XNNPACK/src/qu8-gemm/gen/
D4x16c4-minmax-fp32-aarch64-neondot-ld128.S332 UMIN v0.16b, v0.16b, v5.16b
333 UMIN v1.16b, v1.16b, v5.16b
334 UMIN v2.16b, v2.16b, v5.16b
335 UMIN v3.16b, v3.16b, v5.16b
D4x16c4-minmax-rndnu-aarch64-neondot-ld128.S334 UMIN v0.16b, v0.16b, v5.16b
335 UMIN v1.16b, v1.16b, v5.16b
336 UMIN v2.16b, v2.16b, v5.16b
337 UMIN v3.16b, v3.16b, v5.16b
D4x8c4-minmax-rndnu-aarch64-neondot-ld128.S221 UMIN v0.16b, v0.16b, v5.16b
222 UMIN v1.16b, v1.16b, v5.16b
D4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S582 UMIN v0.16b, v0.16b, v5.16b
583 UMIN v1.16b, v1.16b, v5.16b
584 UMIN v2.16b, v2.16b, v5.16b
585 UMIN v3.16b, v3.16b, v5.16b
D4x16c4-minmax-fp32-aarch64-neondot-cortex-a55.S580 UMIN v0.16b, v0.16b, v5.16b
581 UMIN v1.16b, v1.16b, v5.16b
582 UMIN v2.16b, v2.16b, v5.16b
583 UMIN v3.16b, v3.16b, v5.16b
/external/XNNPACK/src/qu8-igemm/gen/
D4x16c4-minmax-fp32-aarch64-neondot-ld128.S340 UMIN v0.16b, v0.16b, v5.16b
341 UMIN v1.16b, v1.16b, v5.16b
342 UMIN v2.16b, v2.16b, v5.16b
343 UMIN v3.16b, v3.16b, v5.16b
D4x16c4-minmax-rndnu-aarch64-neondot-ld128.S340 UMIN v0.16b, v0.16b, v5.16b
341 UMIN v1.16b, v1.16b, v5.16b
342 UMIN v2.16b, v2.16b, v5.16b
343 UMIN v3.16b, v3.16b, v5.16b
D4x16-minmax-rndnu-aarch64-neon-mlal-lane-ld64.S397 UMIN v0.16b, v0.16b, v5.16b
398 UMIN v1.16b, v1.16b, v5.16b
399 UMIN v2.16b, v2.16b, v5.16b
400 UMIN v3.16b, v3.16b, v5.16b
D4x16c4-minmax-rndnu-aarch64-neondot-cortex-a55.S589 UMIN v0.16b, v0.16b, v5.16b
590 UMIN v1.16b, v1.16b, v5.16b
591 UMIN v2.16b, v2.16b, v5.16b
592 UMIN v3.16b, v3.16b, v5.16b
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_opcode_tmp.h153 OP12(UMIN)
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h445 SMIN, SMAX, UMIN, UMAX, enumerator
/external/XNNPACK/src/qu8-gemm/
D4x16c4-aarch64-neondot-ld128.S.in396 UMIN v0.16b, v0.16b, v5.16b
397 UMIN v1.16b, v1.16b, v5.16b
398 UMIN v2.16b, v2.16b, v5.16b
399 UMIN v3.16b, v3.16b, v5.16b
/external/XNNPACK/src/qu8-igemm/
D4x16c4-aarch64-neondot-ld128.S.in392 UMIN v0.16b, v0.16b, v5.16b
393 UMIN v1.16b, v1.16b, v5.16b
394 UMIN v2.16b, v2.16b, v5.16b
395 UMIN v3.16b, v3.16b, v5.16b

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