Searched refs:URECIP (Results 1 – 7 of 7) sorted by relevance
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | udivrem24.ll | 118 ; RCP_IFLAG is for URECIP in the full 32b alg
138 ; RCP_IFLAG is for URECIP in the full 32b alg
158 ; RCP_IFLAG is for URECIP in the full 32b alg
232 ; RCP_IFLAG is for URECIP in the full 32b alg
252 ; RCP_IFLAG is for URECIP in the full 32b alg
272 ; RCP_IFLAG is for URECIP in the full 32b alg
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.h | 247 URECIP, enumerator
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| D | AMDGPUInstrInfo.td | 155 def AMDGPUurecip : SDNode<"AMDGPUISD::URECIP", SDTIntUnaryOp>;
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| D | AMDGPUISelLowering.cpp | 1433 SDValue RCP = DAG.getNode(AMDGPUISD::URECIP, DL, VT, Den); in LowerUDIVREM()
2821 NODE_NAME_CASE(URECIP) in getTargetNodeName()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.h | 394 URECIP, enumerator
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| D | AMDGPUInstrInfo.td | 234 def AMDGPUurecip : SDNode<"AMDGPUISD::URECIP", SDTIntUnaryOp>;
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| D | AMDGPUISelLowering.cpp | 1869 SDValue RCP = DAG.getNode(AMDGPUISD::URECIP, DL, VT, Den); in LowerUDIVREM()
4264 NODE_NAME_CASE(URECIP) in getTargetNodeName()
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