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Searched refs:VecSize (Results 1 – 25 of 31) sorted by relevance

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/external/deqp/framework/common/
DtcuVector.hpp36 template <typename T, int VecSize, int Size>
40 explicit VecAccess (Vector<T, VecSize>& v, int x, int y);
41 explicit VecAccess (Vector<T, VecSize>& v, int x, int y, int z);
42 explicit VecAccess (Vector<T, VecSize>& v, int x, int y, int z, int w);
49 Vector<T, VecSize>& m_vector;
53 template <typename T, int VecSize, int Size>
54 VecAccess<T, VecSize, Size>::VecAccess (Vector<T, VecSize>& v, int x, int y) in VecAccess()
62 template <typename T, int VecSize, int Size>
63 VecAccess<T, VecSize, Size>::VecAccess (Vector<T, VecSize>& v, int x, int y, int z) in VecAccess()
72 template <typename T, int VecSize, int Size>
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Utils/
DX86ShuffleDecode.cpp495 unsigned VecSize = NumElts * ScalarBits; in DecodeVPERMILPMask() local
496 unsigned NumLanes = VecSize / 128; in DecodeVPERMILPMask()
498 assert((VecSize == 128 || VecSize == 256 || VecSize == 512) && in DecodeVPERMILPMask()
517 unsigned VecSize = NumElts * ScalarBits; in DecodeVPERMIL2PMask() local
518 unsigned NumLanes = VecSize / 128; in DecodeVPERMIL2PMask()
520 assert((VecSize == 128 || VecSize == 256) && "Unexpected vector size"); in DecodeVPERMIL2PMask()
/external/llvm/test/Linker/
Dtestlink.ll14 ; CHECK: %VecSize = type { <5 x i32> }
15 ; CHECK: %VecSize.{{[0-9]}} = type { <10 x i32> }
16 %VecSize = type { <5 x i32> }
109 define void @VecSizeCrash(%VecSize) {
/external/llvm/lib/Target/X86/Utils/
DX86ShuffleDecode.cpp514 unsigned VecSize = VT.getSizeInBits(); in DecodeVPERMILPMask() local
516 unsigned NumLanes = VecSize / 128; in DecodeVPERMILPMask()
518 assert((VecSize == 128 || VecSize == 256 || VecSize == 512) && in DecodeVPERMILPMask()
532 unsigned VecSize = VT.getSizeInBits(); in DecodeVPERMIL2PMask() local
534 unsigned NumLanes = VecSize / 128; in DecodeVPERMIL2PMask()
536 assert((VecSize == 128 || VecSize == 256) && in DecodeVPERMIL2PMask()
/external/llvm/test/Linker/Inputs/
Dtestlink.ll7 %VecSize = type { <10 x i32> }
56 define void @VecSizeCrash1(%VecSize) {
/external/llvm/lib/Target/NVPTX/
DNVPTXReplaceImageHandles.cpp96 unsigned VecSize = in processInstr() local
100 MachineOperand &SurfHandle = MI.getOperand(VecSize); in processInstr()
DNVPTXISelLowering.cpp1212 unsigned VecSize = 4; in LowerCall() local
1214 VecSize = 2; in LowerCall()
1218 unsigned PerStoreOffset = MemVT.getStoreSizeInBits() / 8 * VecSize; in LowerCall()
1220 for (unsigned i = 0; i < NumElts; i += VecSize) { in LowerCall()
1245 if (VecSize == 4) { in LowerCall()
1562 unsigned VecSize = 4; in LowerCall() local
1565 VecSize = 2; in LowerCall()
1568 EVT VecVT = EVT::getVectorVT(F->getContext(), EltVT, VecSize); in LowerCall()
1569 for (unsigned i = 0; i < NumElts; i += VecSize) { in LowerCall()
1576 for (unsigned j = 0; j < VecSize; ++j) in LowerCall()
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DNVPTXISelDAGToDAG.cpp2733 unsigned VecSize; in tryLoadParam() local
2738 VecSize = 1; in tryLoadParam()
2741 VecSize = 2; in tryLoadParam()
2744 VecSize = 4; in tryLoadParam()
2753 switch (VecSize) { in tryLoadParam()
2834 if (VecSize == 1) { in tryLoadParam()
2836 } else if (VecSize == 2) { in tryLoadParam()
DNVPTXAsmPrinter.cpp189 unsigned VecSize = in lowerImageHandleOperand() local
193 if (OpNo == VecSize && MO.isImm()) { in lowerImageHandleOperand()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
DNVPTXReplaceImageHandles.cpp96 unsigned VecSize = in processInstr() local
100 MachineOperand &SurfHandle = MI.getOperand(VecSize); in processInstr()
DNVPTXISelDAGToDAG.cpp2102 unsigned VecSize; in tryLoadParam() local
2107 VecSize = 1; in tryLoadParam()
2110 VecSize = 2; in tryLoadParam()
2113 VecSize = 4; in tryLoadParam()
2122 switch (VecSize) { in tryLoadParam()
2152 if (VecSize == 1) { in tryLoadParam()
2154 } else if (VecSize == 2) { in tryLoadParam()
DNVPTXAsmPrinter.cpp170 unsigned VecSize = in lowerImageHandleOperand() local
174 if (OpNo == VecSize && MO.isImm()) { in lowerImageHandleOperand()
/external/tensorflow/tensorflow/core/util/
Dgpu_kernel_helper.h323 template <int64_t VecSize, template <int vec_size> class Functor>
327 if (max_vec_size >= VecSize) { in operator()
328 return Functor<VecSize>()(std::forward<Args>(args)...); in operator()
330 return DispatchToVectorizedHelper<VecSize / 2, Functor>()( in operator()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonVExtract.cpp161 unsigned VecSize = HRI.getRegSizeInBits(VecRC) / 8; in runOnMachineFunction() local
171 SR == 0 ? 0 : VecSize/2); in runOnMachineFunction()
DHexagonPatternsHVX.td69 int32_t VecSize = HRI->getSpillSize(Hexagon::HvxVRRegClass);
70 assert(isPowerOf2_32(VecSize));
71 if ((uint32_t(V) & (uint32_t(VecSize)-1)) != 0)
73 int32_t L = Log2_32(VecSize);
/external/clang/lib/CodeGen/
DTargetInfo.cpp849 unsigned VecSize = Context.getTypeSize(VT); in isX86VectorTypeForVectorCall() local
850 if (VecSize == 128 || VecSize == 256 || VecSize == 512) in isX86VectorTypeForVectorCall()
4675 unsigned VecSize = getContext().getTypeSize(VT); in isHomogeneousAggregateBaseType() local
4676 if (VecSize == 64 || VecSize == 128) in isHomogeneousAggregateBaseType()
5575 unsigned VecSize = getContext().getTypeSize(VT); in isHomogeneousAggregateBaseType() local
5576 if (VecSize == 64 || VecSize == 128) in isHomogeneousAggregateBaseType()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/
DInstCombineVectorOps.cpp727 int VecSize = Shuf.getOperand(0)->getType()->getVectorNumElements(); in isShuffleEquivalentToSelect() local
730 if (MaskSize != VecSize) in isShuffleEquivalentToSelect()
737 if (Elt != -1 && Elt != i && Elt != i + VecSize) in isShuffleEquivalentToSelect()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstructionSelector.cpp3902 unsigned VecSize = DstTy.getSizeInBits(); in selectInsertElt() local
3924 if (VecSize < 128) { in selectInsertElt()
3928 VecSize, &AArch64::FPR128RegClass, SrcReg, MIRBuilder); in selectInsertElt()
3940 if (VecSize < 128) { in selectInsertElt()
3945 getMinClassForRegBank(*RBI.getRegBank(DemoteVec, MRI, TRI), VecSize); in selectInsertElt()
3954 LLVM_DEBUG(dbgs() << "Unsupported destination size! (" << VecSize in selectInsertElt()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp4811 unsigned VecSize = VecVT.getSizeInBits(); in lowerINSERT_VECTOR_ELT() local
4815 assert(VecSize <= 64); in lowerINSERT_VECTOR_ELT()
4851 MVT IntVT = MVT::getIntegerVT(VecSize); in lowerINSERT_VECTOR_ELT()
4888 unsigned VecSize = VecVT.getSizeInBits(); in lowerEXTRACT_VECTOR_ELT() local
4890 assert(VecSize <= 64); in lowerEXTRACT_VECTOR_ELT()
4904 MVT IntVT = MVT::getIntegerVT(VecSize); in lowerEXTRACT_VECTOR_ELT()
9335 unsigned VecSize = VecVT.getSizeInBits(); in performExtractVectorEltCombine() local
9343 if (VecSize <= 256 && (VecSize > 64 || EltSize >= 32) && in performExtractVectorEltCombine()
9370 VecSize > 32 && in performExtractVectorEltCombine()
9371 VecSize % 32 == 0 && in performExtractVectorEltCombine()
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DSIInstructions.td1406 multiclass SI_INDIRECT_Pattern <ValueType vt, ValueType eltvt, string VecSize> {
1410 (!cast<Instruction>("SI_INDIRECT_SRC_"#VecSize) $src, $idx, imm:$offset)
1416 (!cast<Instruction>("SI_INDIRECT_DST_"#VecSize) $src, $idx, imm:$offset, $val)
DAMDGPURegisterBankInfo.cpp2852 unsigned VecSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping() local
2860 OpdsMapping[0] = AMDGPU::getValueMapping(OutputBankID, VecSize); in getInstrMapping()
2861 OpdsMapping[1] = AMDGPU::getValueMapping(SrcBankID, VecSize); in getInstrMapping()
/external/llvm/lib/IR/
DConstants.cpp930 unsigned VecSize = V.size(); in getTypeForElements() local
931 SmallVector<Type*, 16> EltTypes(VecSize); in getTypeForElements()
932 for (unsigned i = 0; i != VecSize; ++i) in getTypeForElements()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/IR/
DConstants.cpp1103 unsigned VecSize = V.size(); in getTypeForElements() local
1104 SmallVector<Type*, 16> EltTypes(VecSize); in getTypeForElements()
1105 for (unsigned i = 0; i != VecSize; ++i) in getTypeForElements()
/external/clang/lib/AST/
DExprConstant.cpp1743 unsigned VecSize = Info.Ctx.getTypeSize(VecTy); in EvalAndBitcastToAPInt() local
1747 Res = llvm::APInt::getNullValue(VecSize); in EvalAndBitcastToAPInt()
1763 Res |= EltAsInt.zextOrTrunc(VecSize).rotr(i*EltSize+BaseEltSize); in EvalAndBitcastToAPInt()
1765 Res |= EltAsInt.zextOrTrunc(VecSize).rotl(i*EltSize); in EvalAndBitcastToAPInt()
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td3320 multiclass SI_INDIRECT_Pattern <ValueType vt, ValueType eltvt, string VecSize> {
3324 (!cast<Instruction>("SI_INDIRECT_SRC_"#VecSize) $src, $idx, imm:$offset)
3330 (!cast<Instruction>("SI_INDIRECT_DST_"#VecSize) $src, $idx, imm:$offset, $val)

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