| /external/pigweed/pw_preprocessor/ |
| D | arguments_test.cc | 322 …X7, X8, X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25) == 25); in TEST()
323 …8, X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25, X26) == 26); in TEST()
324 …, X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25, X26, X27) == 27); in TEST()
325 …X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25, X26, X27, X28) == … in TEST()
326 …X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25, X26, X27, X28, X29… in TEST()
327 …X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25, X26, X27, X28, X29… in TEST()
328 …X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25, X26, X27, X28, X29… in TEST()
329 …X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25, X26, X27, X28, X29… in TEST()
330 …X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25, X26, X27, X28, X29… in TEST()
331 …X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25, X26, X27, X28, X29… in TEST()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/RISCV/ |
| D | RISCVGenRegisterInfo.inc | 46 X25 = 26,
427 { RISCV::X25 },
481 …V::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV:…
491 …V::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV:…
501 …V::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV:…
647 { 25U, RISCV::X25 },
715 { 25U, RISCV::X25 },
783 { RISCV::X25, 25U },
883 { RISCV::X25, 25U },
1860 …V::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV:…
[all …]
|
| D | RISCVGenSubtargetInfo.inc | 95 { "reserve-x25", "Reserve X25", RISCV::FeatureReserveX25, { { { 0x0ULL, 0x0ULL, 0x0ULL, } } } },
483 if (Bits[RISCV::FeatureReserveX25]) UserReservedRegister[RISCV::X25] = true;
|
| /external/iptables/etc/ |
| D | ethertypes | 13 X25 0805
|
| /external/iproute2/lib/ |
| D | ll_proto.c | 40 __PF(X25,x25)
|
| D | ll_types.c | 57 __PF(X25,x25) in ll_type_n2a()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64CallingConvention.td | 358 CCIfType<[i64], CCAssignToReg<[X19, X20, X21, X22, X23, X24, X25, X26, X27, X28]>>
376 X25, X26, X27, X28, LR, FP,
382 X23, X24, X25, X26, X27, X28,
390 X25, X26, X27, X28, FP, LR,
403 X25, X26, X27, X28, LR, FP,
411 X25, X26, X27, X28, LR, FP)>;
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenRegisterInfo.inc | 324 X25 = 304,
1436 …PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23…
1456 …PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23…
1466 …PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23…
1486 …PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23…
1771 { 25U, PPC::X25 },
2059 { 25U, PPC::X25 },
2588 { PPC::X25, 25U },
2863 { PPC::X25, -2U },
3141 { PPC::X25, 25U },
[all …]
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 57 case AArch64::X25: return AArch64::W25; in getWRegFromXReg()
97 case AArch64::W25: return AArch64::X25; in getXRegFromWReg()
|
| /external/cronet/base/profiler/ |
| D | suspendable_thread_delegate_win.cc | 236 &thread_context->X25, &thread_context->X26, &thread_context->X27, in GetRegistersToRewrite()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 56 case AArch64::X25: return AArch64::W25; in getWRegFromXReg()
96 case AArch64::W25: return AArch64::X25; in getXRegFromWReg()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCCallingConv.td | 320 X21, X22, X23, X24, X25, X26, X27, X28,
329 X21, X22, X23, X24, X25, X26, X27, X28,
336 X21, X22, X23, X24, X25, X26, X27, X28,
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCCallingConv.td | 241 X21, X22, X23, X24, X25, X26, X27, X28,
250 X21, X22, X23, X24, X25, X26, X27, X28,
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64CallingConvention.td | 258 CCIfType<[i64], CCAssignToReg<[X19, X20, X21, X22, X23, X24, X25, X26, X27, X28]>>
270 X23, X24, X25, X26, X27, X28,
|
| D | AArch64RegisterInfo.td | 115 def X25 : AArch64Reg<25, "x25", [W25]>, DwarfRegAlias<W25>;
181 X22, X23, X24, X25, X26,
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64AsmBackend.cpp | 476 else if (Reg1 == AArch64::X25 && Reg2 == AArch64::X26 && in generateCompactUnwindEncoding()
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenRegisterInfo.inc | 261 X25 = 241,
2430 …h64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArc…
2450 …h64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArc…
2460 …h64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArc…
2470 …h64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArc…
2480 …h64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArc…
2490 …h64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArc…
4022 { AArch64::X25, 25U },
4301 { AArch64::X25, 25U },
6853 …h64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArc…
[all …]
|
| /external/OpenCSD/decoder/tests/snapshots/a55-test-tpiu/ |
| D | device1.ini | 32 X25(size:64)=0x0000000000000000
|
| /external/OpenCSD/decoder/tests/snapshots/a57_single_step/ |
| D | device1.ini | 32 X25(size:64)=0x0000000000000000
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVRegisterInfo.td | 76 def X25 : RISCVReg<25,"x25", ["s9"]>, DwarfRegNum<[25]>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64AsmBackend.cpp | 662 else if (Reg1 == AArch64::X25 && Reg2 == AArch64::X26 && in generateCompactUnwindEncoding()
|
| D | AArch64MCTargetDesc.cpp | 122 {codeview::RegisterId::ARM64_X25, AArch64::X25}, in initLLVMToCVRegMapping()
|
| /external/guava/android/guava-tests/benchmark/com/google/common/base/ |
| D | EnumsBenchmark.java | 108 X25, enumConstant
211 X25, enumConstant
|
| /external/guava/guava-tests/benchmark/com/google/common/base/ |
| D | EnumsBenchmark.java | 108 X25, enumConstant
211 X25, enumConstant
|
| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 192 PPC::X24, PPC::X25, PPC::X26, PPC::X27,
|