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Searched refs:andps (Results 1 – 25 of 63) sorted by relevance

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/external/mesa3d/src/mesa/x86/
Dread_rgba_span_x86.S391 andps %xmm1, %xmm0
393 andps %xmm2, %xmm3
396 andps %xmm2, %xmm4
420 andps %xmm1, %xmm0
422 andps %xmm2, %xmm3
425 andps %xmm2, %xmm4
450 andps %xmm1, %xmm0
452 andps %xmm2, %xmm3
455 andps %xmm2, %xmm4
/external/llvm/test/CodeGen/X86/
Dfast-isel-select-sse.ll11 ; CHECK-NEXT: andps %xmm0, %xmm2
39 ; CHECK-NEXT: andps %xmm1, %xmm2
67 ; CHECK-NEXT: andps %xmm1, %xmm2
95 ; CHECK-NEXT: andps %xmm0, %xmm2
123 ; CHECK-NEXT: andps %xmm0, %xmm2
151 ; CHECK-NEXT: andps %xmm0, %xmm2
179 ; CHECK-NEXT: andps %xmm0, %xmm2
207 ; CHECK-NEXT: andps %xmm0, %xmm2
235 ; CHECK-NEXT: andps %xmm0, %xmm2
263 ; CHECK-NEXT: andps %xmm1, %xmm2
[all …]
Dcopysign-constant-magnitude.ll69 ; CHECK-NEXT: andps [[SIGNMASK]](%rip), %xmm0
75 ; CHECK-NEXT: andps [[SIGNMASK]](%rip), %xmm0
82 ; CHECK-NEXT: andps [[SIGNMASK]](%rip), %xmm0
89 ; CHECK-NEXT: andps [[SIGNMASK]](%rip), %xmm0
Dfp-select-cmp-and.ll90 ; CHECK-NEXT: andps %xmm1, %xmm0
100 ; CHECK-NEXT: andps %xmm1, %xmm0
110 ; CHECK-NEXT: andps %xmm1, %xmm2
120 ; CHECK-NEXT: andps %xmm1, %xmm2
170 ; CHECK-NEXT: andps %xmm3, %xmm2
Dfold-pcmpeqd-2.ll59 %andps.i5 = and <4 x i32> %bitcast.i3, zeroinitializer ; <<4 x i32>> [#uses=1]
66 %andps.i14 = add <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %bitcast6.i13 ; <<4 x i32>> [#uses=1]
69 %orps.i18 = or <4 x i32> %andnps.i17, %andps.i14 ; <<4 x i32>> [#uses=1]
75 %orps.i9 = or <4 x i32> %andnps.i8, %andps.i5 ; <<4 x i32>> [#uses=1]
79 %andps.i = and <4 x i32> zeroinitializer, %bitcast6.i ; <<4 x i32>> [#uses=1]
83 %orps.i = or <4 x i32> %andnps.i, %andps.i ; <<4 x i32>> [#uses=1]
Dselect-with-and-or.ll10 ; CHECK-NEXT: andps
30 ; CHECK-NEXT: andps
70 ; CHECK-NEXT: andps
Dvec_reassociate.ll52 ;CHECK-NEXT: andps %xmm1, %xmm0
53 ;CHECK-NEXT: andps .LCPI4_0(%rip), %xmm0
64 ;CHECK-NEXT: andps %xmm1, %xmm0
65 ;CHECK-NEXT: andps .LCPI5_0(%rip), %xmm0
Dsse-fcopysign.ll59 ; X32-NEXT: andps .LCPI2_0, %xmm0
61 ; X32-NEXT: andps .LCPI2_1, %xmm1
69 ; X64: andps .LCPI2_0(%rip), %xmm0
70 ; X64-NEXT: andps .LCPI2_1(%rip), %xmm1
Dfp-logic.ll114 ; CHECK-NEXT: andps %xmm1, %xmm0
129 ; CHECK-NEXT: andps %xmm1, %xmm0
143 ; CHECK-NEXT: andps %xmm1, %xmm0
158 ; CHECK-NEXT: andps %xmm1, %xmm0
256 ; CHECK-NEXT: andps %xmm1, %xmm0
292 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
Dvec_ext_inreg.ll66 ; SSE-NEXT: andps %xmm2, %xmm0
67 ; SSE-NEXT: andps %xmm2, %xmm1
88 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
Dwiden_bitops-1.ll134 ; X32-SSE-NEXT: andps %xmm1, %xmm0
139 ; X64-SSE-NEXT: andps %xmm1, %xmm0
189 ; X32-SSE-NEXT: andps %xmm1, %xmm0
194 ; X64-SSE-NEXT: andps %xmm1, %xmm0
Dfmaxnum.ll23 ; SSE-NEXT: andps %xmm1, %xmm3
79 ; SSE-NEXT: andps %xmm1, %xmm3
127 ; SSE-NEXT: andps %xmm0, %xmm1
145 ; SSE-NEXT: andps %xmm0, %xmm1
Dfminnum.ll23 ; SSE-NEXT: andps %xmm1, %xmm3
72 ; SSE-NEXT: andps %xmm1, %xmm3
119 ; SSE-NEXT: andps %xmm0, %xmm1
137 ; SSE-NEXT: andps %xmm0, %xmm1
Dx86-setcc-int-to-fp-combine.ll11 ; CHECK-NEXT: andps LCPI0_0(%rip), %xmm0
64 ; CHECK-NEXT: andps LCPI3_0(%rip), %xmm0
Dpr13577.ll30 ; CHECK: andps
Dcombine-64bit-vec-binop.ll129 ; SSE41: andps
142 ; SSE41: andps
155 ; SSE41: andps
Dsse2-vector-shifts.ll265 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
295 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
316 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
317 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
Dfold-vex.ll28 ; SSE-NEXT: andps %xmm1, %xmm0
Dlogical-load-fold.ll38 ; SSE2-NEXT: andps %xmm1, %xmm0
Durem-power-of-two.ll76 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
/external/llvm/test/MC/X86/
Dintel-syntax-ambiguous.s53 andps xmm1, xmmword ptr xmm1 label
56 andps xmmword ptr xmm1, xmm1 label
/external/mesa3d/src/mesa/x86-64/
Dxform4.S165 andps %xmm9, %xmm4 /* 0.0 | m2 | m1 | m0 */
167 andps %xmm9, %xmm5 /* 0.0 | m6 | m5 | m4 */
169 andps %xmm9, %xmm6 /* 0.0 | m10 | m9 | m8 */
170 andps %xmm9, %xmm7 /* 0.0 | m14 | m13 | m12 */
/external/musl/src/math/x32/
Dfabsf.s6 andps %xmm1,%xmm0
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrVecCompiler.td399 // andps is shorter than andpd or pand. andps is SSE and andpd/pand are in SSE2
420 // andps is shorter than andpd or pand. andps is SSE and andpd/pand are in SSE2
441 // andps is shorter than andpd or pand. andps is SSE and andpd/pand are in SSE2
/external/swiftshader/third_party/subzero/src/
DREADME.SIMD.rst57 operation can be implemented with pand, andpd, or andps. This pattern also

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