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Searched refs:avx2_rr1_lut4_p4 (Results 1 – 14 of 14) sorted by relevance

/external/XNNPACK/src/f32-velu/gen/
Dvelu-avx2-rr1-lut4-p4-perm-x8.c26 const __m256 vprescale = _mm256_load_ps(params->avx2_rr1_lut4_p4.prescale); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8()
27 const __m256 valpha = _mm256_load_ps(params->avx2_rr1_lut4_p4.alpha); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8()
28 const __m256 vbeta = _mm256_load_ps(params->avx2_rr1_lut4_p4.beta); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8()
29 const __m256 vsat_cutoff = _mm256_load_ps(params->avx2_rr1_lut4_p4.sat_cutoff); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8()
30 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_lut4_p4.magic_bias); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8()
31 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_lut4_p4.log2e); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8()
32 const __m256 vtable = _mm256_load_ps(params->avx2_rr1_lut4_p4.table); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8()
33 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_lut4_p4.minus_ln2); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8()
34 const __m256 vc4 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c4); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8()
35 const __m256 vc3 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c3); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8()
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Dvelu-avx2-rr1-lut4-p4-perm-x16.c26 const __m256 vprescale = _mm256_load_ps(params->avx2_rr1_lut4_p4.prescale); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16()
27 const __m256 valpha = _mm256_load_ps(params->avx2_rr1_lut4_p4.alpha); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16()
28 const __m256 vbeta = _mm256_load_ps(params->avx2_rr1_lut4_p4.beta); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16()
29 const __m256 vsat_cutoff = _mm256_load_ps(params->avx2_rr1_lut4_p4.sat_cutoff); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16()
30 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_lut4_p4.magic_bias); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16()
31 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_lut4_p4.log2e); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16()
32 const __m256 vtable = _mm256_load_ps(params->avx2_rr1_lut4_p4.table); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16()
33 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_lut4_p4.minus_ln2); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16()
34 const __m256 vc4 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c4); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16()
35 const __m256 vc3 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c3); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x16()
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Dvelu-avx2-rr1-lut4-p4-perm-x24.c26 const __m256 vprescale = _mm256_load_ps(params->avx2_rr1_lut4_p4.prescale); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24()
27 const __m256 valpha = _mm256_load_ps(params->avx2_rr1_lut4_p4.alpha); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24()
28 const __m256 vbeta = _mm256_load_ps(params->avx2_rr1_lut4_p4.beta); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24()
29 const __m256 vsat_cutoff = _mm256_load_ps(params->avx2_rr1_lut4_p4.sat_cutoff); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24()
30 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_lut4_p4.magic_bias); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24()
31 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_lut4_p4.log2e); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24()
32 const __m256 vtable = _mm256_load_ps(params->avx2_rr1_lut4_p4.table); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24()
33 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_lut4_p4.minus_ln2); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24()
34 const __m256 vc4 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c4); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24()
35 const __m256 vc3 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c3); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x24()
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Dvelu-avx2-rr1-lut4-p4-perm-x32.c26 const __m256 vprescale = _mm256_load_ps(params->avx2_rr1_lut4_p4.prescale); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32()
27 const __m256 valpha = _mm256_load_ps(params->avx2_rr1_lut4_p4.alpha); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32()
28 const __m256 vbeta = _mm256_load_ps(params->avx2_rr1_lut4_p4.beta); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32()
29 const __m256 vsat_cutoff = _mm256_load_ps(params->avx2_rr1_lut4_p4.sat_cutoff); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32()
30 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_lut4_p4.magic_bias); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32()
31 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_lut4_p4.log2e); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32()
32 const __m256 vtable = _mm256_load_ps(params->avx2_rr1_lut4_p4.table); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32()
33 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_lut4_p4.minus_ln2); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32()
34 const __m256 vc4 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c4); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32()
35 const __m256 vc3 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c3); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x32()
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Dvelu-avx2-rr1-lut4-p4-perm-x40.c26 const __m256 vprescale = _mm256_load_ps(params->avx2_rr1_lut4_p4.prescale); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40()
27 const __m256 valpha = _mm256_load_ps(params->avx2_rr1_lut4_p4.alpha); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40()
28 const __m256 vbeta = _mm256_load_ps(params->avx2_rr1_lut4_p4.beta); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40()
29 const __m256 vsat_cutoff = _mm256_load_ps(params->avx2_rr1_lut4_p4.sat_cutoff); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40()
30 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_lut4_p4.magic_bias); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40()
31 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_lut4_p4.log2e); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40()
32 const __m256 vtable = _mm256_load_ps(params->avx2_rr1_lut4_p4.table); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40()
33 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_lut4_p4.minus_ln2); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40()
34 const __m256 vc4 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c4); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40()
35 const __m256 vc3 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c3); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x40()
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Dvelu-avx2-rr1-lut4-p4-perm-x48.c26 const __m256 vprescale = _mm256_load_ps(params->avx2_rr1_lut4_p4.prescale); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48()
27 const __m256 valpha = _mm256_load_ps(params->avx2_rr1_lut4_p4.alpha); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48()
28 const __m256 vbeta = _mm256_load_ps(params->avx2_rr1_lut4_p4.beta); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48()
29 const __m256 vsat_cutoff = _mm256_load_ps(params->avx2_rr1_lut4_p4.sat_cutoff); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48()
30 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_lut4_p4.magic_bias); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48()
31 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_lut4_p4.log2e); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48()
32 const __m256 vtable = _mm256_load_ps(params->avx2_rr1_lut4_p4.table); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48()
33 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_lut4_p4.minus_ln2); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48()
34 const __m256 vc4 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c4); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48()
35 const __m256 vc3 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c3); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48()
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Dvelu-avx2-rr1-lut4-p4-perm-x56.c26 const __m256 vprescale = _mm256_load_ps(params->avx2_rr1_lut4_p4.prescale); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
27 const __m256 valpha = _mm256_load_ps(params->avx2_rr1_lut4_p4.alpha); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
28 const __m256 vbeta = _mm256_load_ps(params->avx2_rr1_lut4_p4.beta); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
29 const __m256 vsat_cutoff = _mm256_load_ps(params->avx2_rr1_lut4_p4.sat_cutoff); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
30 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_lut4_p4.magic_bias); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
31 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_lut4_p4.log2e); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
32 const __m256 vtable = _mm256_load_ps(params->avx2_rr1_lut4_p4.table); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
33 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_lut4_p4.minus_ln2); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
34 const __m256 vc4 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c4); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
35 const __m256 vc3 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c3); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
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Dvelu-avx2-rr1-lut4-p4-perm-x64.c26 const __m256 vprescale = _mm256_load_ps(params->avx2_rr1_lut4_p4.prescale); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64()
27 const __m256 valpha = _mm256_load_ps(params->avx2_rr1_lut4_p4.alpha); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64()
28 const __m256 vbeta = _mm256_load_ps(params->avx2_rr1_lut4_p4.beta); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64()
29 const __m256 vsat_cutoff = _mm256_load_ps(params->avx2_rr1_lut4_p4.sat_cutoff); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64()
30 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_lut4_p4.magic_bias); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64()
31 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_lut4_p4.log2e); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64()
32 const __m256 vtable = _mm256_load_ps(params->avx2_rr1_lut4_p4.table); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64()
33 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_lut4_p4.minus_ln2); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64()
34 const __m256 vc4 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c4); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64()
35 const __m256 vc3 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c3); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64()
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Dvelu-avx2-rr1-lut4-p4-perm-x72.c26 const __m256 vprescale = _mm256_load_ps(params->avx2_rr1_lut4_p4.prescale); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72()
27 const __m256 valpha = _mm256_load_ps(params->avx2_rr1_lut4_p4.alpha); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72()
28 const __m256 vbeta = _mm256_load_ps(params->avx2_rr1_lut4_p4.beta); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72()
29 const __m256 vsat_cutoff = _mm256_load_ps(params->avx2_rr1_lut4_p4.sat_cutoff); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72()
30 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_lut4_p4.magic_bias); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72()
31 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_lut4_p4.log2e); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72()
32 const __m256 vtable = _mm256_load_ps(params->avx2_rr1_lut4_p4.table); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72()
33 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_lut4_p4.minus_ln2); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72()
34 const __m256 vc4 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c4); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72()
35 const __m256 vc3 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c3); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72()
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Dvelu-avx2-rr1-lut4-p4-perm-x80.c26 const __m256 vprescale = _mm256_load_ps(params->avx2_rr1_lut4_p4.prescale); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80()
27 const __m256 valpha = _mm256_load_ps(params->avx2_rr1_lut4_p4.alpha); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80()
28 const __m256 vbeta = _mm256_load_ps(params->avx2_rr1_lut4_p4.beta); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80()
29 const __m256 vsat_cutoff = _mm256_load_ps(params->avx2_rr1_lut4_p4.sat_cutoff); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80()
30 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_lut4_p4.magic_bias); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80()
31 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_lut4_p4.log2e); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80()
32 const __m256 vtable = _mm256_load_ps(params->avx2_rr1_lut4_p4.table); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80()
33 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_lut4_p4.minus_ln2); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80()
34 const __m256 vc4 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c4); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80()
35 const __m256 vc3 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c3); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80()
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/external/XNNPACK/src/f32-velu/
Davx2-rr1-lut4-p4-perm.c.in25 const __m256 vprescale = _mm256_load_ps(params->avx2_rr1_lut4_p4.prescale);
26 const __m256 valpha = _mm256_load_ps(params->avx2_rr1_lut4_p4.alpha);
27 const __m256 vbeta = _mm256_load_ps(params->avx2_rr1_lut4_p4.beta);
28 const __m256 vsat_cutoff = _mm256_load_ps(params->avx2_rr1_lut4_p4.sat_cutoff);
29 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_lut4_p4.magic_bias);
30 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_lut4_p4.log2e);
31 const __m256 vtable = _mm256_load_ps(params->avx2_rr1_lut4_p4.table);
32 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_lut4_p4.minus_ln2);
33 const __m256 vc4 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c4);
34 const __m256 vc3 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c3);
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/external/XNNPACK/src/
Dmicroparams-init.c3049 params->avx2_rr1_lut4_p4.prescale[i] = prescale; in xnn_init_f32_elu_avx2_rr1_lut4_p4_params()
3050 params->avx2_rr1_lut4_p4.alpha[i] = alpha; in xnn_init_f32_elu_avx2_rr1_lut4_p4_params()
3051 params->avx2_rr1_lut4_p4.beta[i] = beta; in xnn_init_f32_elu_avx2_rr1_lut4_p4_params()
3052 params->avx2_rr1_lut4_p4.sat_cutoff[i] = -0x1.154246p+4f; in xnn_init_f32_elu_avx2_rr1_lut4_p4_params()
3053 params->avx2_rr1_lut4_p4.magic_bias[i] = 0x1.800000p21f; in xnn_init_f32_elu_avx2_rr1_lut4_p4_params()
3054 params->avx2_rr1_lut4_p4.log2e[i] = 0x1.715476p+0f; in xnn_init_f32_elu_avx2_rr1_lut4_p4_params()
3056 params->avx2_rr1_lut4_p4.table[0] = 0x1.000000p+0f; in xnn_init_f32_elu_avx2_rr1_lut4_p4_params()
3057 params->avx2_rr1_lut4_p4.table[1] = 0x1.F06FE0p-1f; in xnn_init_f32_elu_avx2_rr1_lut4_p4_params()
3058 params->avx2_rr1_lut4_p4.table[2] = 0x1.EA09E6p-1f; in xnn_init_f32_elu_avx2_rr1_lut4_p4_params()
3059 params->avx2_rr1_lut4_p4.table[3] = 0x1.EE89FAp-1f; in xnn_init_f32_elu_avx2_rr1_lut4_p4_params()
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/external/XNNPACK/src/amalgam/
Davx2.c1849 const __m256 vprescale = _mm256_load_ps(params->avx2_rr1_lut4_p4.prescale); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
1850 const __m256 valpha = _mm256_load_ps(params->avx2_rr1_lut4_p4.alpha); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
1851 const __m256 vbeta = _mm256_load_ps(params->avx2_rr1_lut4_p4.beta); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
1852 const __m256 vsat_cutoff = _mm256_load_ps(params->avx2_rr1_lut4_p4.sat_cutoff); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
1853 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_lut4_p4.magic_bias); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
1854 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_lut4_p4.log2e); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
1855 const __m256 vtable = _mm256_load_ps(params->avx2_rr1_lut4_p4.table); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
1856 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_lut4_p4.minus_ln2); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
1857 const __m256 vc4 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c4); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
1858 const __m256 vc3 = _mm256_load_ps(params->avx2_rr1_lut4_p4.c3); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
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/external/XNNPACK/src/xnnpack/
Dmicroparams.h1649 } avx2_rr1_lut4_p4; member