| /external/mesa3d/src/intel/tools/ |
| D | i965_gram.y | 923 brw_set_src0(p, brw_last_inst, dest);
936 brw_set_src0(p, brw_last_inst, $5);
959 brw_set_src0(p, brw_last_inst, $6);
981 brw_set_src0(p, brw_last_inst, $5);
1001 brw_set_src0(p, brw_last_inst, $5);
1029 brw_set_src0(p, brw_last_inst, $5);
1090 brw_set_src0(p, brw_last_inst, brw_ip_reg());
1111 brw_set_src0(p, brw_last_inst, retype(brw_null_reg(),
1118 brw_set_src0(p, brw_last_inst, retype(brw_null_reg(),
1122 brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
[all …]
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| /external/igt-gpu-tools/assembler/ |
| D | brw_eu_emit.c | 247 brw_set_src0(struct brw_compile *p, struct brw_instruction *insn, in brw_set_src0() function
788 brw_set_src0(p, insn, src); in brw_alu1()
800 brw_set_src0(p, insn, src0); in brw_alu2()
965 brw_set_src0(p, rnd, src); \
1089 brw_set_src0(p, insn, retype(brw_vec4_grf(0,0), BRW_REGISTER_TYPE_UD)); in brw_NOP()
1184 brw_set_src0(p, insn, brw_ip_reg()); in brw_IF()
1189 brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); in brw_IF()
1193 brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); in brw_IF()
1231 brw_set_src0(p, insn, src0); in gen6_IF()
1385 brw_set_src0(p, insn, brw_ip_reg()); in brw_ELSE()
[all …]
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| D | brw_eu.h | 120 void brw_set_src0(struct brw_compile *p, struct brw_instruction *insn,
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| D | gram.y | 3135 brw_set_src0(&genasm_compile, GEN(instr), src->reg); in set_instruction_src0()
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_eu_emit.c | 209 brw_set_src0(struct brw_codegen *p, brw_inst *inst, struct brw_reg reg) in brw_set_src0() function
715 brw_set_src0(p, insn, src); in brw_alu1()
729 brw_set_src0(p, insn, src0); in brw_alu2()
1409 brw_set_src0(p, insn, brw_ip_reg()); in brw_IF()
1414 brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); in brw_IF()
1418 brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); in brw_IF()
1425 brw_set_src0(p, insn, brw_imm_d(0)); in brw_IF()
1457 brw_set_src0(p, insn, src0); in gen6_IF()
1610 brw_set_src0(p, insn, brw_ip_reg()); in brw_ELSE()
1615 brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); in brw_ELSE()
[all …]
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| D | brw_vec4_generator.cpp | 775 brw_set_src0(p, send, urb_header); in generate_tcs_urb_write()
962 brw_set_src0(p, send, header); in generate_vec4_urb_read()
999 brw_set_src0(p, send, header); in generate_tcs_release_input()
1177 brw_set_src0(p, send, header); in generate_scratch_read()
1253 brw_set_src0(p, send, header); in generate_scratch_write()
1316 brw_set_src0(p, send, header); in generate_pull_constant_load()
1367 brw_set_src0(p, insn, offset); in generate_pull_constant_load_gen7()
1386 brw_set_src0(p, insn_and, vec1(retype(surf_index, BRW_REGISTER_TYPE_UD))); in generate_pull_constant_load_gen7()
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| D | brw_fs_generator.cpp | 821 brw_set_src0(p, send, header); in generate_urb_read()
843 brw_set_src0(p, insn, payload); in generate_urb_write()
873 brw_set_src0(p, insn, retype(payload, BRW_REGISTER_TYPE_UW)); in generate_cs_terminate()
1632 brw_set_src0(p, send, retype(payload, BRW_REGISTER_TYPE_UD)); in generate_uniform_pull_constant_load_gen7()
1653 brw_set_src0(p, insn_and, vec1(retype(index, BRW_REGISTER_TYPE_UD))); in generate_uniform_pull_constant_load_gen7()
1717 brw_set_src0(p, send, header); in generate_varying_pull_constant_load_gen4()
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| D | brw_eu.h | 203 void brw_set_src0(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
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