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Searched refs:cb_dcc_base (Results 1 – 4 of 4) sorted by relevance

/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state.c2898 uint64_t cb_color_base, cb_color_fmask, cb_color_cmask, cb_dcc_base; in si_emit_framebuffer_state() local
2929 cb_dcc_base = 0; in si_emit_framebuffer_state()
2950 cb_dcc_base = in si_emit_framebuffer_state()
2956 cb_dcc_base |= dcc_tile_swizzle; in si_emit_framebuffer_state()
2990 radeon_emit(cs, cb_dcc_base); /* CB_COLOR0_DCC_BASE */ in si_emit_framebuffer_state()
2997 radeon_set_context_reg(cs, R_028EA0_CB_COLOR0_DCC_BASE_EXT + i * 4, cb_dcc_base >> 32); in si_emit_framebuffer_state()
3035 radeon_emit(cs, cb_dcc_base); /* CB_COLOR0_DCC_BASE */ in si_emit_framebuffer_state()
3036 radeon_emit(cs, S_028C98_BASE_256B(cb_dcc_base >> 32)); /* CB_COLOR0_DCC_BASE_EXT */ in si_emit_framebuffer_state()
3056 if (cb_dcc_base) in si_emit_framebuffer_state()
3057 cb_dcc_base += level_info->dcc_offset >> 8; in si_emit_framebuffer_state()
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/external/mesa3d/src/amd/vulkan/
Dradv_cmd_buffer.c1615 radeon_emit(cmd_buffer->cs, cb->cb_dcc_base); in radv_emit_fb_color_state()
1624 cb->cb_dcc_base >> 32); in radv_emit_fb_color_state()
1644 radeon_emit(cmd_buffer->cs, cb->cb_dcc_base); in radv_emit_fb_color_state()
1645 radeon_emit(cmd_buffer->cs, S_028C98_BASE_256B(cb->cb_dcc_base >> 32)); in radv_emit_fb_color_state()
1664 …adeon_set_context_reg(cmd_buffer->cs, R_028C94_CB_COLOR0_DCC_BASE + index * 0x3c, cb->cb_dcc_base); in radv_emit_fb_color_state()
Dradv_private.h1225 uint64_t cb_dcc_base; member
Dradv_device.c6810 cb->cb_dcc_base = va >> 8; in radv_initialise_color_surface()
6811 cb->cb_dcc_base |= dcc_tile_swizzle; in radv_initialise_color_surface()